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    Subject[PATCH AUTOSEL 6.2 22/25] drm/amdgpu: add mes resume when do gfx post soft reset
    Date
    From: Tong Liu01 <Tong.Liu01@amd.com>

    [ Upstream commit 4eb0b49a0ad3e004a6a65b84efe37bc7e66d560f ]

    [why]
    when gfx do soft reset, mes will also do reset, if mes is not
    resumed when do recover from soft reset, mes is unable to respond
    in later sequence

    [how]
    resume mes when do gfx post soft reset

    Signed-off-by: Tong Liu01 <Tong.Liu01@amd.com>
    Acked-by: Alex Deucher <alexander.deucher@amd.com>
    Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
    Signed-off-by: Sasha Levin <sashal@kernel.org>
    ---
    drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c | 9 +++++++++
    1 file changed, 9 insertions(+)

    diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
    index 66eb102cd88fb..c748d92cec8e7 100644
    --- a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
    +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
    @@ -4625,6 +4625,14 @@ static bool gfx_v11_0_check_soft_reset(void *handle)
    return false;
    }

    +static int gfx_v11_0_post_soft_reset(void *handle)
    +{
    + /**
    + * GFX soft reset will impact MES, need resume MES when do GFX soft reset
    + */
    + return amdgpu_mes_resume((struct amdgpu_device *)handle);
    +}
    +
    static uint64_t gfx_v11_0_get_gpu_clock_counter(struct amdgpu_device *adev)
    {
    uint64_t clock;
    @@ -6096,6 +6104,7 @@ static const struct amd_ip_funcs gfx_v11_0_ip_funcs = {
    .wait_for_idle = gfx_v11_0_wait_for_idle,
    .soft_reset = gfx_v11_0_soft_reset,
    .check_soft_reset = gfx_v11_0_check_soft_reset,
    + .post_soft_reset = gfx_v11_0_post_soft_reset,
    .set_clockgating_state = gfx_v11_0_set_clockgating_state,
    .set_powergating_state = gfx_v11_0_set_powergating_state,
    .get_clockgating_state = gfx_v11_0_get_clockgating_state,
    --
    2.39.2
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