Messages in this thread | | | Date | Tue, 28 Mar 2023 14:43:50 +0100 | From | Mark Brown <> | Subject | Re: [PATCH SPI for-next] spi: microchip: pci1xxxx: Fix minor bugs in spi-pci1xxxx driver |
| |
On Tue, Mar 28, 2023 at 11:12:12AM +0530, Tharun Kumar P wrote: > Following bugs are fixed in this patch: > 1. pci1xxxx_spi_resume API masks SPI interrupt bit which prohibits > firing of interrupt to the host at the end of the transaction after > suspend-resume. This patch unmasks this bit at resume. > 2. In pci1xxxx_spi_transfer_one API, length of SPI transaction gets > cleared by unmasking length field. Set length of transaction after > unmasking length field. > 3. Remove support for disabling chip select as hardware does not support > the same.
As covered in submitting-patches.rst you should send one patch per change, this makes things much easier to review.
> drivers/spi/spi-pci1xxxx.c | 12 ++++-------- > 1 file changed, 4 insertions(+), 8 deletions(-)
The subject says this is a patch for the microchip driver...
> /* Set the DEV_SEL bits of the SPI_MST_CTL_REG */ > regval = readl(par->reg_base + SPI_MST_CTL_REG_OFFSET(p->hw_inst)); > - if (enable) { > + if (!enable) { > regval &= ~SPI_MST_CTL_DEVSEL_MASK; > regval |= (spi_get_chipselect(spi, 0) << 25); > writel(regval, > par->reg_base + SPI_MST_CTL_REG_OFFSET(p->hw_inst)); > - } else { > - regval &= ~(spi_get_chipselect(spi, 0) << 25); > - writel(regval, > - par->reg_base + SPI_MST_CTL_REG_OFFSET(p->hw_inst)); > -
I am unclear how chip select will ever be asserted with this change? Now the value is only written if we are disabling. [unhandled content-type:application/pgp-signature] | |