Messages in this thread | | | From | "Tian, Kevin" <> | Subject | RE: [PATCH v1 14/14] iommu/arm-smmu-v3: Add arm_smmu_cache_invalidate_user | Date | Fri, 24 Mar 2023 08:55:29 +0000 |
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> From: Nicolin Chen <nicolinc@nvidia.com> > Sent: Wednesday, March 22, 2023 1:15 PM > > > > > Something has to generate CMD_ATC_INV. > > > > How do you plan to generate this from the hypervisor based on ASID > > invalidations? > > > > The hypervisor doesn't know what ASIDs are connected to what SIDs to > > generate the ATC? > > > > Intel is different, they know what devices the vDID is connected to, > > so when they get a vDID invalidation they can elaborate it into a ATC > > invalidation. ARM doesn't have that information. > > I see. Perhaps vSMMU still needs to forward CMD_ATC_INV. And,
Ah that's quite a different story. 😊
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