Messages in this thread | | | Date | Thu, 23 Mar 2023 09:17:46 -0300 | From | Jason Gunthorpe <> | Subject | Re: [PATCH v1 14/14] iommu/arm-smmu-v3: Add arm_smmu_cache_invalidate_user |
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On Wed, Mar 22, 2023 at 01:57:23PM -0700, Nicolin Chen wrote: > On Mon, Mar 20, 2023 at 07:19:34PM -0300, Jason Gunthorpe wrote: > > > > IIUIC, the ioctl for the link of vSID/dev_id should happen at > > > the stage when boot boots, while the HWPT alloc ioctl happens > > > at CFGI_STE. > > > > Yes > > > > > > > What could be a good prototype of the ioctl? Would it be a VFIO > > > > > device one or IOMMUFD one? > > > > > > > > If we load the vSID table it should be a iommufd one, linked to the > > > > ARM SMMUv3 driver and probably take in a pointer to an array of > > > > vSID/dev_id pairs. Maybe an add/remove type of operation. > > > > > > Will try some solution. > > > > It is only necessary if you want to do batching > > > > For non-batching the SID invalidation should be done differently with > > a device_id input instead. That is a bit tricky to organize as you > > want iommufd to get back a 'struct device *' from the ID. > > I am wondering whether we need to have dev_id, i.e. IOMMUFD, > in play with the link of pSID<->vSID, as I am thinking of a > simplified approach by passing the vSID via the hwpt alloc > structure when we allocate an S2 domain.
No, that doesn't make sense. the vSID is per-STE, the S2 domain is fully shared. You can't put SID information in the iommu_domains.
JAson
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