Messages in this thread | | | Date | Thu, 2 Mar 2023 12:07:00 +0100 | Subject | Re: [PATCH v1 3/4] arm64: dts: mt8195: Align vppsys node to dtschema | From | Matthias Brugger <> |
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On 09/02/2023 17:03, matthias.bgg@kernel.org wrote: > From: Matthias Brugger <matthias.bgg@gmail.com> > > As the node is a syscon, this has to be reflected in the compatible and > the node name. > > Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
A similar patch is already in v6.3-tmp/dts64: 168136cbef9c ("arm64: dts: mediatek: mt8195: add MMSYS configuration for VPPSYS")
I'll drop this one as well. My bad, I should have noticed that earlier.
Regards, Matthias
> --- > > arch/arm64/boot/dts/mediatek/mt8195.dtsi | 8 ++++---- > 1 file changed, 4 insertions(+), 4 deletions(-) > > diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts/mediatek/mt8195.dtsi > index 8f1264d5290bf..5261367031426 100644 > --- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi > +++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi > @@ -1795,8 +1795,8 @@ mfgcfg: clock-controller@13fbf000 { > #clock-cells = <1>; > }; > > - vppsys0: clock-controller@14000000 { > - compatible = "mediatek,mt8195-vppsys0"; > + vppsys0: syscon@14000000 { > + compatible = "mediatek,mt8195-vppsys0", "syscon"; > reg = <0 0x14000000 0 0x1000>; > #clock-cells = <1>; > }; > @@ -1900,8 +1900,8 @@ larb8: larb@14e05000 { > power-domains = <&spm MT8195_POWER_DOMAIN_WPESYS>; > }; > > - vppsys1: clock-controller@14f00000 { > - compatible = "mediatek,mt8195-vppsys1"; > + vppsys1: syscon@14f00000 { > + compatible = "mediatek,mt8195-vppsys1", "syscon"; > reg = <0 0x14f00000 0 0x1000>; > #clock-cells = <1>; > };
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