Messages in this thread | | | Date | Thu, 2 Mar 2023 11:52:13 +0200 | Subject | Re: [PATCH v5] remoteproc: imx_dsp_rproc: add custom memory copy implementation for i.MX DSP Cores | From | Iuliana Prodan <> |
| |
Hi Mathieu,
On 3/1/2023 8:56 PM, Mathieu Poirier wrote: > On Wed, Mar 01, 2023 at 11:49:16AM -0700, Mathieu Poirier wrote: >> Hi Iuliana, >> >> On Tue, Feb 21, 2023 at 07:03:56PM +0200, Iuliana Prodan (OSS) wrote: >>> From: Iuliana Prodan <iuliana.prodan@nxp.com> >>> >>> The IRAM is part of the HiFi DSP. >>> According to hardware specification only 32-bits write are allowed >>> otherwise we get a Kernel panic. >>> >>> Therefore add a custom memory copy and memset functions to deal with >>> the above restriction. >>> >>> Signed-off-by: Iuliana Prodan <iuliana.prodan@nxp.com> >>> --- >>> Changes since v4 >>> - use GENMASK; >>> - s/ioread32/readl; >>> - s/iowrite32/writel; >>> - use for loop with writel instead of __iowrite32_copy; >>> - update multi-line comment format. >>> >> This looks good now. I will queue this on March 13th when 6.3-rc2 is out. >> > And out of curiosity, are the remote processors handled by imx_rproc.c also have > the same 32-bit write constraints? If so, it would be nice to have a patch that > fixes that as well. In such a case, imx_dsp_rproc_memcpy() and > imx_dsp_rproc_memset() should be renamed to something more generic and re-used > in imx_rproc.c.
None that I know of.
But, this restriction applies to any core who's writing to IRAM. When one is writing from anywhere else in the system to IRAM, this is a PIF write. And the inbound PIF writes are 32-bits at a time.
Thanks,
Iulia
| |