Messages in this thread | | | Date | Wed, 15 Mar 2023 10:09:35 +0100 | From | neil.armstrong@linaro ... | Subject | Re: [PATCH 2/2] drm/panel: support for STARRY 2081101QFH032011-53G MIPI-DSI panel |
| |
On 14/03/2023 10:05, Ruihai Zhou wrote: > The STARRY 2081101QFH032011-53G is a 10.1" WUXGA TFT LCD panel, > which fits in nicely with the existing panel-boe-tv101wum-nl6 > driver. Hence, we add a new compatible with panel specific config. > > Signed-off-by: Ruihai Zhou <zhouruihai@huaqin.corp-partner.google.com> > --- > .../gpu/drm/panel/panel-boe-tv101wum-nl6.c | 126 ++++++++++++++++++ > 1 file changed, 126 insertions(+) > > diff --git a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c > index c924f1124ebc..783234ae0f57 100644 > --- a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c > +++ b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c > @@ -1131,6 +1131,103 @@ static const struct panel_init_cmd auo_b101uan08_3_init_cmd[] = { > {}, > }; > > +static const struct panel_init_cmd starry_qfh032011_53g_init_cmd[] = { > + _INIT_DCS_CMD(0xB0, 0x01), > + _INIT_DCS_CMD(0xC3, 0x4F), > + _INIT_DCS_CMD(0xC4, 0x40), > + _INIT_DCS_CMD(0xC5, 0x40), > + _INIT_DCS_CMD(0xC6, 0x40), > + _INIT_DCS_CMD(0xC7, 0x40), > + _INIT_DCS_CMD(0xC8, 0x4D), > + _INIT_DCS_CMD(0xC9, 0x52), > + _INIT_DCS_CMD(0xCA, 0x51), > + _INIT_DCS_CMD(0xCD, 0x5D), > + _INIT_DCS_CMD(0xCE, 0x5B), > + _INIT_DCS_CMD(0xCF, 0x4B), > + _INIT_DCS_CMD(0xD0, 0x49), > + _INIT_DCS_CMD(0xD1, 0x47), > + _INIT_DCS_CMD(0xD2, 0x45), > + _INIT_DCS_CMD(0xD3, 0x41), > + _INIT_DCS_CMD(0xD7, 0x50), > + _INIT_DCS_CMD(0xD8, 0x40), > + _INIT_DCS_CMD(0xD9, 0x40), > + _INIT_DCS_CMD(0xDA, 0x40), > + _INIT_DCS_CMD(0xDB, 0x40), > + _INIT_DCS_CMD(0xDC, 0x4E), > + _INIT_DCS_CMD(0xDD, 0x52), > + _INIT_DCS_CMD(0xDE, 0x51), > + _INIT_DCS_CMD(0xE1, 0x5E), > + _INIT_DCS_CMD(0xE2, 0x5C), > + _INIT_DCS_CMD(0xE3, 0x4C), > + _INIT_DCS_CMD(0xE4, 0x4A), > + _INIT_DCS_CMD(0xE5, 0x48), > + _INIT_DCS_CMD(0xE6, 0x46), > + _INIT_DCS_CMD(0xE7, 0x42), > + _INIT_DCS_CMD(0xB0, 0x03), > + _INIT_DCS_CMD(0xBE, 0x03), > + _INIT_DCS_CMD(0xCC, 0x44), > + _INIT_DCS_CMD(0xC8, 0x07), > + _INIT_DCS_CMD(0xC9, 0x05), > + _INIT_DCS_CMD(0xCA, 0x42), > + _INIT_DCS_CMD(0xCD, 0x3E), > + _INIT_DCS_CMD(0xCF, 0x60), > + _INIT_DCS_CMD(0xD2, 0x04), > + _INIT_DCS_CMD(0xD3, 0x04), > + _INIT_DCS_CMD(0xD4, 0x01), > + _INIT_DCS_CMD(0xD5, 0x00), > + _INIT_DCS_CMD(0xD6, 0x03), > + _INIT_DCS_CMD(0xD7, 0x04), > + _INIT_DCS_CMD(0xD9, 0x01), > + _INIT_DCS_CMD(0xDB, 0x01), > + _INIT_DCS_CMD(0xE4, 0xF0), > + _INIT_DCS_CMD(0xE5, 0x0A), > + _INIT_DCS_CMD(0xB0, 0x00), > + _INIT_DCS_CMD(0xCC, 0x08), > + _INIT_DCS_CMD(0xC2, 0x08), > + _INIT_DCS_CMD(0xC4, 0x10), > + _INIT_DCS_CMD(0xB0, 0x02), > + _INIT_DCS_CMD(0xC0, 0x00), > + _INIT_DCS_CMD(0xC1, 0x0A), > + _INIT_DCS_CMD(0xC2, 0x20), > + _INIT_DCS_CMD(0xC3, 0x24), > + _INIT_DCS_CMD(0xC4, 0x23), > + _INIT_DCS_CMD(0xC5, 0x29), > + _INIT_DCS_CMD(0xC6, 0x23), > + _INIT_DCS_CMD(0xC7, 0x1C), > + _INIT_DCS_CMD(0xC8, 0x19), > + _INIT_DCS_CMD(0xC9, 0x17), > + _INIT_DCS_CMD(0xCA, 0x17), > + _INIT_DCS_CMD(0xCB, 0x18), > + _INIT_DCS_CMD(0xCC, 0x1A), > + _INIT_DCS_CMD(0xCD, 0x1E), > + _INIT_DCS_CMD(0xCE, 0x20), > + _INIT_DCS_CMD(0xCF, 0x23), > + _INIT_DCS_CMD(0xD0, 0x07), > + _INIT_DCS_CMD(0xD1, 0x00), > + _INIT_DCS_CMD(0xD2, 0x00), > + _INIT_DCS_CMD(0xD3, 0x0A), > + _INIT_DCS_CMD(0xD4, 0x13), > + _INIT_DCS_CMD(0xD5, 0x1C), > + _INIT_DCS_CMD(0xD6, 0x1A), > + _INIT_DCS_CMD(0xD7, 0x13), > + _INIT_DCS_CMD(0xD8, 0x17), > + _INIT_DCS_CMD(0xD9, 0x1C), > + _INIT_DCS_CMD(0xDA, 0x19), > + _INIT_DCS_CMD(0xDB, 0x17), > + _INIT_DCS_CMD(0xDC, 0x17), > + _INIT_DCS_CMD(0xDD, 0x18), > + _INIT_DCS_CMD(0xDE, 0x1A), > + _INIT_DCS_CMD(0xDF, 0x1E), > + _INIT_DCS_CMD(0xE0, 0x20), > + _INIT_DCS_CMD(0xE1, 0x23), > + _INIT_DCS_CMD(0xE2, 0x07), > + _INIT_DCS_CMD(0X11), > + _INIT_DELAY_CMD(120), > + _INIT_DCS_CMD(0X29), > + _INIT_DELAY_CMD(80), > + {}, > +}; > + > static inline struct boe_panel *to_boe_panel(struct drm_panel *panel) > { > return container_of(panel, struct boe_panel, base); > @@ -1497,6 +1594,32 @@ static const struct panel_desc boe_tv105wum_nw0_desc = { > .init_cmds = boe_init_cmd, > }; > > +static const struct drm_display_mode starry_qfh032011_53g_default_mode = { > + .clock = 165731, > + .hdisplay = 1200, > + .hsync_start = 1200 + 100, > + .hsync_end = 1200 + 100 + 10, > + .htotal = 1200 + 100 + 10 + 100, > + .vdisplay = 1920, > + .vsync_start = 1920 + 14, > + .vsync_end = 1920 + 14 + 10, > + .vtotal = 1920 + 14 + 10 + 15, > +}; > + > +static const struct panel_desc starry_qfh032011_53g_desc = { > + .modes = &starry_qfh032011_53g_default_mode, > + .bpc = 8, > + .size = { > + .width_mm = 135, > + .height_mm = 216, > + }, > + .lanes = 4, > + .format = MIPI_DSI_FMT_RGB888, > + .mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE | > + MIPI_DSI_MODE_LPM, > + .init_cmds = starry_qfh032011_53g_init_cmd, > +}; > + > static int boe_panel_get_modes(struct drm_panel *panel, > struct drm_connector *connector) > { > @@ -1667,6 +1790,9 @@ static const struct of_device_id boe_of_match[] = { > { .compatible = "innolux,hj110iz-01a", > .data = &inx_hj110iz_desc > }, > + { .compatible = "starry,2081101qfh032011-53g", > + .data = &starry_qfh032011_53g_desc > + }, > { /* sentinel */ } > }; > MODULE_DEVICE_TABLE(of, boe_of_match);
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
| |