Messages in this thread | | | Date | Wed, 15 Mar 2023 08:55:59 +0100 | Subject | Re: [PATCH v3 01/11] dt-bindings: clock: Add StarFive JH7110 System-Top-Group clock and reset generator | From | Krzysztof Kozlowski <> |
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On 14/03/2023 13:43, Xingyu Wu wrote: > Add bindings for the System-Top-Group clock and reset generator (STGCRG) > on the JH7110 RISC-V SoC by StarFive Ltd. > > Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com> > --- > .../clock/starfive,jh7110-stgcrg.yaml | 82 +++++++++++++++++++ > .../dt-bindings/clock/starfive,jh7110-crg.h | 34 ++++++++ > .../dt-bindings/reset/starfive,jh7110-crg.h | 28 +++++++ > 3 files changed, 144 insertions(+)
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Best regards, Krzysztof
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