Messages in this thread | | | Date | Mon, 13 Mar 2023 13:58:27 +0100 | Subject | Re: [PATCH v6 1/2] drm/i915/gt: introduce vm->scratch_range callback | From | "Das, Nirmoy" <> |
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On 3/10/2023 10:23 AM, Andrzej Hajda wrote: > The callback will be responsible for setting scratch page PTEs for > specified range. In contrast to clear_range it cannot be optimized to nop. > It will be used by code adding guard pages. > > Signed-off-by: Andrzej Hajda <andrzej.hajda@intel.com> Reviewed-by: Nirmoy Das <nirmoy.das@intel.com> > --- > drivers/gpu/drm/i915/gt/intel_ggtt.c | 23 +++++++++++++++++++++++ > drivers/gpu/drm/i915/gt/intel_ggtt_gmch.c | 1 + > drivers/gpu/drm/i915/gt/intel_gtt.h | 2 ++ > 3 files changed, 26 insertions(+) > > diff --git a/drivers/gpu/drm/i915/gt/intel_ggtt.c b/drivers/gpu/drm/i915/gt/intel_ggtt.c > index 842e69c7b21e49..38e6f0b207fe0c 100644 > --- a/drivers/gpu/drm/i915/gt/intel_ggtt.c > +++ b/drivers/gpu/drm/i915/gt/intel_ggtt.c > @@ -291,6 +291,27 @@ static void gen8_ggtt_insert_entries(struct i915_address_space *vm, > ggtt->invalidate(ggtt); > } > > +static void gen8_ggtt_clear_range(struct i915_address_space *vm, > + u64 start, u64 length) > +{ > + struct i915_ggtt *ggtt = i915_vm_to_ggtt(vm); > + unsigned int first_entry = start / I915_GTT_PAGE_SIZE; > + unsigned int num_entries = length / I915_GTT_PAGE_SIZE; > + const gen8_pte_t scratch_pte = vm->scratch[0]->encode; > + gen8_pte_t __iomem *gtt_base = > + (gen8_pte_t __iomem *)ggtt->gsm + first_entry; > + const int max_entries = ggtt_total_entries(ggtt) - first_entry; > + int i; > + > + if (WARN(num_entries > max_entries, > + "First entry = %d; Num entries = %d (max=%d)\n", > + first_entry, num_entries, max_entries)) > + num_entries = max_entries; > + > + for (i = 0; i < num_entries; i++) > + gen8_set_pte(>t_base[i], scratch_pte); > +} > + > static void gen6_ggtt_insert_page(struct i915_address_space *vm, > dma_addr_t addr, > u64 offset, > @@ -919,6 +940,7 @@ static int gen8_gmch_probe(struct i915_ggtt *ggtt) > ggtt->vm.cleanup = gen6_gmch_remove; > ggtt->vm.insert_page = gen8_ggtt_insert_page; > ggtt->vm.clear_range = nop_clear_range; > + ggtt->vm.scratch_range = gen8_ggtt_clear_range; > > ggtt->vm.insert_entries = gen8_ggtt_insert_entries; > > @@ -1082,6 +1104,7 @@ static int gen6_gmch_probe(struct i915_ggtt *ggtt) > ggtt->vm.clear_range = nop_clear_range; > if (!HAS_FULL_PPGTT(i915)) > ggtt->vm.clear_range = gen6_ggtt_clear_range; > + ggtt->vm.scratch_range = gen6_ggtt_clear_range; > ggtt->vm.insert_page = gen6_ggtt_insert_page; > ggtt->vm.insert_entries = gen6_ggtt_insert_entries; > ggtt->vm.cleanup = gen6_gmch_remove; > diff --git a/drivers/gpu/drm/i915/gt/intel_ggtt_gmch.c b/drivers/gpu/drm/i915/gt/intel_ggtt_gmch.c > index 77c793812eb46a..d6a74ae2527bd9 100644 > --- a/drivers/gpu/drm/i915/gt/intel_ggtt_gmch.c > +++ b/drivers/gpu/drm/i915/gt/intel_ggtt_gmch.c > @@ -102,6 +102,7 @@ int intel_ggtt_gmch_probe(struct i915_ggtt *ggtt) > ggtt->vm.insert_page = gmch_ggtt_insert_page; > ggtt->vm.insert_entries = gmch_ggtt_insert_entries; > ggtt->vm.clear_range = gmch_ggtt_clear_range; > + ggtt->vm.scratch_range = gmch_ggtt_clear_range; > ggtt->vm.cleanup = gmch_ggtt_remove; > > ggtt->invalidate = gmch_ggtt_invalidate; > diff --git a/drivers/gpu/drm/i915/gt/intel_gtt.h b/drivers/gpu/drm/i915/gt/intel_gtt.h > index 5a775310d3fcb5..69ce55f517f567 100644 > --- a/drivers/gpu/drm/i915/gt/intel_gtt.h > +++ b/drivers/gpu/drm/i915/gt/intel_gtt.h > @@ -298,6 +298,8 @@ struct i915_address_space { > u64 start, u64 length); > void (*clear_range)(struct i915_address_space *vm, > u64 start, u64 length); > + void (*scratch_range)(struct i915_address_space *vm, > + u64 start, u64 length); > void (*insert_page)(struct i915_address_space *vm, > dma_addr_t addr, > u64 offset, >
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