lkml.org 
[lkml]   [2023]   [Mar]   [11]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
    Patch in this message
    /
    From
    Subject[PATCH v11 09/15] spi: cadence-quadspi: Add compatible for AMD Pensando Elba SoC
    Date
    The AMD Pensando Elba SoC has the Cadence QSPI controller integrated.

    The quirk CQSPI_NEEDS_APB_AHB_HAZARD_WAR is added and if enabled
    a dummy readback from the controller is performed to ensure
    synchronization.

    Signed-off-by: Brad Larson <blarson@amd.com>
    ---

    v9 changes:
    - Rebase to linux-next 6.2.0-rc1

    ---
    drivers/spi/spi-cadence-quadspi.c | 19 +++++++++++++++++++
    1 file changed, 19 insertions(+)

    diff --git a/drivers/spi/spi-cadence-quadspi.c b/drivers/spi/spi-cadence-quadspi.c
    index 64b6a460d739..ad82d2ab3442 100644
    --- a/drivers/spi/spi-cadence-quadspi.c
    +++ b/drivers/spi/spi-cadence-quadspi.c
    @@ -40,6 +40,7 @@
    #define CQSPI_SUPPORT_EXTERNAL_DMA BIT(2)
    #define CQSPI_NO_SUPPORT_WR_COMPLETION BIT(3)
    #define CQSPI_SLOW_SRAM BIT(4)
    +#define CQSPI_NEEDS_APB_AHB_HAZARD_WAR BIT(5)

    /* Capabilities */
    #define CQSPI_SUPPORTS_OCTAL BIT(0)
    @@ -90,6 +91,7 @@ struct cqspi_st {
    u32 pd_dev_id;
    bool wr_completion;
    bool slow_sram;
    + bool apb_ahb_hazard;
    };

    struct cqspi_driver_platdata {
    @@ -1004,6 +1006,13 @@ static int cqspi_indirect_write_execute(struct cqspi_flash_pdata *f_pdata,
    if (cqspi->wr_delay)
    ndelay(cqspi->wr_delay);

    + /*
    + * If a hazard exists between the APB and AHB interfaces, perform a
    + * dummy readback from the controller to ensure synchronization.
    + */
    + if (cqspi->apb_ahb_hazard)
    + readl(reg_base + CQSPI_REG_INDIRECTWR);
    +
    while (remaining > 0) {
    size_t write_words, mod_bytes;

    @@ -1734,6 +1743,8 @@ static int cqspi_probe(struct platform_device *pdev)
    cqspi->wr_completion = false;
    if (ddata->quirks & CQSPI_SLOW_SRAM)
    cqspi->slow_sram = true;
    + if (ddata->quirks & CQSPI_NEEDS_APB_AHB_HAZARD_WAR)
    + cqspi->apb_ahb_hazard = true;

    if (of_device_is_compatible(pdev->dev.of_node,
    "xlnx,versal-ospi-1.0"))
    @@ -1859,6 +1870,10 @@ static const struct cqspi_driver_platdata versal_ospi = {
    .get_dma_status = cqspi_get_versal_dma_status,
    };

    +static const struct cqspi_driver_platdata pensando_cdns_qspi = {
    + .quirks = CQSPI_NEEDS_APB_AHB_HAZARD_WAR | CQSPI_DISABLE_DAC_MODE,
    +};
    +
    static const struct of_device_id cqspi_dt_ids[] = {
    {
    .compatible = "cdns,qspi-nor",
    @@ -1884,6 +1899,10 @@ static const struct of_device_id cqspi_dt_ids[] = {
    .compatible = "intel,socfpga-qspi",
    .data = &socfpga_qspi,
    },
    + {
    + .compatible = "amd,pensando-elba-qspi",
    + .data = &pensando_cdns_qspi,
    + },
    { /* end of table */ }
    };

    --
    2.17.1
    \
     
     \ /
      Last update: 2023-03-27 00:55    [W:3.169 / U:0.040 seconds]
    ©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site