Messages in this thread | ![/](/images/icornerl.gif) | | Date | Tue, 7 Feb 2023 18:36:07 +0530 | Subject | Re: [PATCH v2 1/4] spi: cadence-quadspi: Reset CMD_CTRL Reg on cmd r/w completion | From | "Gole, Dhruva" <> |
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Thanks for taking a look Pratyush!
On 1/27/2023 8:46 PM, Pratyush Yadav wrote: > Hi, > > On Wed, Jan 25 2023, Dhruva Gole wrote: > >> If one leaves the CQSPI_REG_CMDCTRL in an unclean state this may cause >> issues in future command reads. This issue came to light when some flash >> reads in STIG mode were coming back dirty. > Can you explain in more detail what you mean by "reads coming back > dirty"? Because I don't see any clear reason why not resetting the > register would break anything. We re-create the register value from the > scratch on the next read anyway, and as soon as you writel() that, the > old fields get thrown away anyway. There's a hardware bug due to which clearing of this register is necessary. > [...]
-- Regards, Dhruva Gole <d-gole@ti.com>
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