Messages in this thread Patch in this message | | | From | Luo Jie <> | Subject | [PATCH v7 07/14] net: phy: at803x: add the possible_interfaces | Date | Thu, 14 Dec 2023 17:48:06 +0800 |
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When qca808x works on the interface mode sgmii or 2500base-x, the interface mode can be switched according to the PHY link speed.
Signed-off-by: Luo Jie <quic_luoj@quicinc.com> --- drivers/net/phy/at803x.c | 12 ++++++++++++ 1 file changed, 12 insertions(+)
diff --git a/drivers/net/phy/at803x.c b/drivers/net/phy/at803x.c index b6b41b1a4352..c186ef8e798f 100644 --- a/drivers/net/phy/at803x.c +++ b/drivers/net/phy/at803x.c @@ -2101,10 +2101,22 @@ static void qca808x_link_change_notify(struct phy_device *phydev) QCA8081_PHY_FIFO_RSTN, phydev->link ? QCA8081_PHY_FIFO_RSTN : 0); } +static void qca808x_fill_possible_interfaces(struct phy_device *phydev) +{ + unsigned long *possible = phydev->possible_interfaces; + + if (phydev->interface != PHY_INTERFACE_MODE_10G_QXGMII) { + __set_bit(PHY_INTERFACE_MODE_2500BASEX, possible); + __set_bit(PHY_INTERFACE_MODE_SGMII, possible); + } +} + static int qca8084_config_init(struct phy_device *phydev) { int ret; + qca808x_fill_possible_interfaces(phydev); + /* Invert ADC clock edge */ ret = at803x_debug_reg_mask(phydev, QCA8084_ADC_CLK_SEL, QCA8084_ADC_CLK_SEL_ACLK, -- 2.42.0
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