Messages in this thread | | | Date | Fri, 6 Oct 2023 18:40:36 +0200 | From | Benedikt Spranger <> | Subject | Re: [PATCH 1/1] clk: socfpga: gate: Fix of by factor 2 for serial console |
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On Fri, 6 Oct 2023 17:01:34 +0200 Maxime Ripard <mripard@kernel.org> wrote:
> On Thu, Oct 05, 2023 at 08:32:23PM +0200, Benedikt Spranger wrote: > > On Thu, 5 Oct 2023 13:34:01 +0200 > > Maxime Ripard <mripard@kernel.org> wrote: > > > > > Where is that factor 2 coming from? > > In drivers/tty/serial/8250/8250_dw.c p->uartclk is set twice as high, > > as it should be: > > > > dw8250_set_termios() is called and rate is evaluated to 20000000 in the > > bad and 10000000 in the good case. As a result p->uartclk is set to > > 20000000 in the bad case. > > Sure, sorry I worded that poorly. What I meant was what clock tree > decision is taken now that wasn't taken before that leads to that factor > 2 difference. OK.
> Thanks for the traces, that's helpful. It looks like the culprit is: > > Good: > > init-1 [001] ..... 0.125643: clk_rate_request_start: l4_sp_clk min 0 max 4294967295, parent per_base_clk (200000000) > init-1 [001] ..... 0.125651: clk_rate_request_done: l4_sp_clk min 0 max 4294967295, parent per_base_clk (200000000) > init-1 [001] ..... 0.125657: dw8250_set_termios: dw8250_set_termios: rate = 200000000 newrate = 1843200 > > vs Bad: > > init-1 [001] ..... 0.116063: clk_rate_request_start: l4_sp_clk min 0 max 4294967295, parent per_base_clk (200000000) > init-1 [001] ..... 0.116089: clk_rate_request_done: l4_sp_clk min 0 max 4294967295, parent per_base_clk (200000000) > init-1 [001] ..... 0.116096: dw8250_set_termios: dw8250_set_termios: rate = 4294967274 newrate = 1843200 > > The rate returned is super suspicious, as it's an -EINVAL casted into an > unsigned long. So I think something on that clock chain is returning an > error for some reason, which is then treated as a rate by the rest and > everybody's just confused. OK.
> What is the board that you're using? I am using a Cyclone5 DE0-Nano-Soc/Atlas board (socfpga_cyclone5_de0_nano_soc.dts).
Regards Benedikt Spranger
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