Messages in this thread | | | From | Linu Cherian <> | Subject | RE: [EXT] Re: [PATCH 1/7] dt-bindings: arm: coresight-tmc: Add "memory-region" property | Date | Fri, 6 Oct 2023 04:27:02 +0000 |
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Hi Krzysztof,
> -----Original Message----- > From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> > Sent: Tuesday, October 3, 2023 12:02 PM > To: Linu Cherian <lcherian@marvell.com>; suzuki.poulose@arm.com; > mike.leach@linaro.org; james.clark@arm.com; leo.yan@linaro.org > Cc: linux-arm-kernel@lists.infradead.org; coresight@lists.linaro.org; linux- > kernel@vger.kernel.org; robh+dt@kernel.org; > krzysztof.kozlowski+dt@linaro.org; conor+dt@kernel.org; > devicetree@vger.kernel.org; Sunil Kovvuri Goutham > <sgoutham@marvell.com>; George Cherian <gcherian@marvell.com> > Subject: Re: [EXT] Re: [PATCH 1/7] dt-bindings: arm: coresight-tmc: Add > "memory-region" property > > On 03/10/2023 06:33, Linu Cherian wrote: > > Hi Krzysztof, > > > >> -----Original Message----- > >> From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> > >> Sent: Saturday, September 30, 2023 8:59 PM > >> To: Linu Cherian <lcherian@marvell.com>; suzuki.poulose@arm.com; > >> mike.leach@linaro.org; james.clark@arm.com; leo.yan@linaro.org > >> Cc: linux-arm-kernel@lists.infradead.org; coresight@lists.linaro.org; > >> linux- kernel@vger.kernel.org; robh+dt@kernel.org; > >> krzysztof.kozlowski+dt@linaro.org; conor+dt@kernel.org; > >> devicetree@vger.kernel.org; Sunil Kovvuri Goutham > >> <sgoutham@marvell.com>; George Cherian <gcherian@marvell.com> > >> Subject: [EXT] Re: [PATCH 1/7] dt-bindings: arm: coresight-tmc: Add > >> "memory-region" property > >> > >> External Email > >> > >> --------------------------------------------------------------------- > >> - On 29/09/2023 15:37, Linu Cherian wrote: > >>> memory-region 0: Reserved trace buffer memory > >>> > >>> TMC ETR: When available, use this reserved memory region for > >>> trace data capture. Same region is used for trace data > >>> retention after a panic or watchdog reset. > >>> > >>> TMC ETF: When available, use this reserved memory region for > >>> trace data retention synced from internal SRAM after a panic or > >>> watchdog reset. > >>> > >>> memory-region 1: Reserved meta data memory > >>> > >>> TMC ETR, ETF: When available, use this memory for register > >>> snapshot retention synced from hardware registers after a panic > >>> or watchdog reset. > >>> > >>> Signed-off-by: Linu Cherian <lcherian@marvell.com> > >>> --- > >> > >> Where is the changelog? This is supposed to be v4 or something later. > >> Please, keep proper versioning and changelog. > > > > Sure, will add the changelog from next version onwards. > > > > Yeah, the last version was RFC v3 and the RFC tag has been dropped from > this version onwards. > > Hence started this version with V1. > > v1 says it is the first version, but you already had three others. > Please keep continuous version log, regardless whether you call it RFC or RFT > or RFsomething.
Okay. Will continue with Patch V5 from next series and add necessary notes in cover letter.
> > > > >> > >>> .../bindings/arm/arm,coresight-tmc.yaml | 19 > +++++++++++++++++++ > >>> 1 file changed, 19 insertions(+) > >>> > > Best regards, > Krzysztof
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