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    Subject[PATCH v2 08/12] riscv: dts: starfive: Add pool for coherent DMA memory on JH7100 boards
    Date
    From: Emil Renner Berthing <emil.renner.berthing@canonical.com>

    The StarFive JH7100 SoC has non-coherent device DMAs, but most drivers
    expect to be able to allocate coherent memory for DMA descriptors and
    such. However on the JH7100 DDR memory appears twice in the physical
    memory map, once cached and once uncached:

    0x00_8000_0000 - 0x08_7fff_ffff : Off chip DDR memory, cached
    0x10_0000_0000 - 0x17_ffff_ffff : Off chip DDR memory, uncached

    To use this uncached region we create a global DMA memory pool there and
    reserve the corresponding area in the cached region.

    However the uncached region is fully above the 32bit address limit, so add
    a dma-ranges map so the DMA address used for peripherals is still in the
    regular cached region below the limit.

    Link: https://github.com/starfive-tech/JH7100_Docs/blob/main/JH7100%20Data%20Sheet%20V01.01.04-EN%20(4-21-2021).pdf
    Signed-off-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
    Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
    ---
    .../boot/dts/starfive/jh7100-common.dtsi | 24 +++++++++++++++++++
    1 file changed, 24 insertions(+)

    diff --git a/arch/riscv/boot/dts/starfive/jh7100-common.dtsi b/arch/riscv/boot/dts/starfive/jh7100-common.dtsi
    index b93ce351a90f..504c73f01f14 100644
    --- a/arch/riscv/boot/dts/starfive/jh7100-common.dtsi
    +++ b/arch/riscv/boot/dts/starfive/jh7100-common.dtsi
    @@ -39,6 +39,30 @@ led-ack {
    label = "ack";
    };
    };
    +
    + reserved-memory {
    + #address-cells = <2>;
    + #size-cells = <2>;
    + ranges;
    +
    + dma-reserved {
    + reg = <0x0 0xfa000000 0x0 0x1000000>;
    + no-map;
    + };
    +
    + linux,dma {
    + compatible = "shared-dma-pool";
    + reg = <0x10 0x7a000000 0x0 0x1000000>;
    + no-map;
    + linux,dma-default;
    + };
    + };
    +
    + soc {
    + dma-ranges = <0x00 0x80000000 0x00 0x80000000 0x00 0x7a000000>,
    + <0x00 0xfa000000 0x10 0x7a000000 0x00 0x01000000>,
    + <0x00 0xfb000000 0x00 0xfb000000 0x07 0x85000000>;
    + };
    };

    &gpio {
    --
    2.42.0
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