Messages in this thread | | | Date | Thu, 26 Oct 2023 14:59:13 -0400 | Subject | Re: [POC][RFC][PATCH v2] sched: Extended Scheduler Time Slice | From | Mathieu Desnoyers <> |
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On 2023-10-26 14:50, Linus Torvalds wrote: > On Thu, 26 Oct 2023 at 08:36, Mathieu Desnoyers > <mathieu.desnoyers@efficios.com> wrote: >> >>> asm volatile("xchg %b0,%1" >> >> which has an implicit lock prefix (xchg with a memory operand is a >> special-case): > > Yeah, this is why we do "percpu_xchg()" - which does not want locked > semantics - as a "cmpxchg" loop. > > Steven, check out > > arch/x86/include/asm/percpu.h > > for a rough implementation of a 'xchg()' without SMP coherency, just > cpu-local one (ie atomic wrt being preempted by the kernel, but not > atomic wrt other CPU's accessing the same variable concurrently)
Actually Steven does not need a xchg to test-and-set a single bit which is only accessed concurrently between kernel and userspace from the same thread. Either "bts" or "andb" should work fine.
Thanks,
Mathieu
> > Linus
-- Mathieu Desnoyers EfficiOS Inc. https://www.efficios.com
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