Messages in this thread Patch in this message | | | From | Neil Armstrong <> | Date | Wed, 25 Oct 2023 09:47:43 +0200 | Subject | [PATCH RFC 3/8] arm64: dts: qcom: pm8550ve: make PMK8550VE SID configurable |
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The pm8550ve can be found with a different SID on SM8650 platforms, make it configurable.
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> --- arch/arm64/boot/dts/qcom/pm8550ve.dtsi | 11 ++++++++--- 1 file changed, 8 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/pm8550ve.dtsi b/arch/arm64/boot/dts/qcom/pm8550ve.dtsi index c47646a467be..fbd8a386cef2 100644 --- a/arch/arm64/boot/dts/qcom/pm8550ve.dtsi +++ b/arch/arm64/boot/dts/qcom/pm8550ve.dtsi @@ -6,6 +6,11 @@ #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/spmi/spmi.h> +/* (Sadly) this PMIC can be configured to be at different SIDs */ +#ifndef PMK8550VE_SID + #define PMK8550VE_SID 5 +#endif + / { thermal-zones { pm8550ve-thermal { @@ -33,16 +38,16 @@ trip1 { &spmi_bus { - pm8550ve: pmic@5 { + pm8550ve: pmic@PMK8550VE_SID { compatible = "qcom,pm8550", "qcom,spmi-pmic"; - reg = <0x5 SPMI_USID>; + reg = <PMK8550VE_SID SPMI_USID>; #address-cells = <1>; #size-cells = <0>; pm8550ve_temp_alarm: temp-alarm@a00 { compatible = "qcom,spmi-temp-alarm"; reg = <0xa00>; - interrupts = <0x5 0xa 0x0 IRQ_TYPE_EDGE_BOTH>; + interrupts = <PMK8550VE_SID 0xa 0x0 IRQ_TYPE_EDGE_BOTH>; #thermal-sensor-cells = <0>; }; -- 2.34.1
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