Messages in this thread | | | Date | Sat, 21 Oct 2023 11:47:03 +0200 | From | Sebastian Fricke <> | Subject | Re: [PATCH 2/7] media: mediatek: vcodec: Setting the supported h264 level for each platform |
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Hey Yunfei,
please replace Setting with Set in the title.
On 21.10.2023 11:23, Sebastian Fricke wrote: >Hey Yunfei, > >On 16.10.2023 14:43, Yunfei Dong wrote: >>The supported resolution and fps of different platforms are not the >>same. Need to set the supported level according to the chip name. > >I would suggest the following rewording: > >Set the maximum H264 codec level for each platform. >The various mediatek platforms support different levels for decoding, >the level of the codec limits among others the maximum resolution, bit >rate and frame rate for the decoder. > >With that you can add: >Reviewed-by: Sebastian Fricke <sebastian.fricke@collabora.com> > >Regards, >Sebastian > >> >>Signed-off-by: Yunfei Dong <yunfei.dong@mediatek.com> >>--- >>.../vcodec/decoder/mtk_vcodec_dec_stateless.c | 45 +++++++++++++++++++ >>1 file changed, 45 insertions(+) >> >>diff --git a/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_stateless.c b/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_stateless.c >>index e29c9c58f3da..f4af81bddc58 100644 >>--- a/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_stateless.c >>+++ b/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_stateless.c >>@@ -56,6 +56,15 @@ static const struct mtk_stateless_control mtk_stateless_controls[] = { >> }, >> .codec_type = V4L2_PIX_FMT_H264_SLICE, >> }, >>+ { >>+ .cfg = { >>+ .id = V4L2_CID_MPEG_VIDEO_H264_LEVEL, >>+ .min = V4L2_MPEG_VIDEO_H264_LEVEL_1_0, >>+ .def = V4L2_MPEG_VIDEO_H264_LEVEL_4_1, >>+ .max = V4L2_MPEG_VIDEO_H264_LEVEL_4_2, >>+ }, >>+ .codec_type = V4L2_PIX_FMT_H264_SLICE, >>+ }, >> { >> .cfg = { >> .id = V4L2_CID_STATELESS_H264_DECODE_MODE, >>@@ -519,6 +528,40 @@ static const struct v4l2_ctrl_ops mtk_vcodec_dec_ctrl_ops = { >> .s_ctrl = mtk_vdec_s_ctrl, >>}; >> >>+static void mtk_vcodec_dec_fill_h264_level(struct v4l2_ctrl_config *cfg, >>+ struct mtk_vcodec_dec_ctx *ctx) >>+{ >>+ switch (ctx->dev->chip_name) { >>+ case MTK_VDEC_MT8192: >>+ cfg->max = V4L2_MPEG_VIDEO_H264_LEVEL_5_1; >>+ break; >>+ case MTK_VDEC_MT8188: >>+ case MTK_VDEC_MT8195: >>+ cfg->max = V4L2_MPEG_VIDEO_H264_LEVEL_5_2; >>+ break; >>+ case MTK_VDEC_MT8183: >>+ case MTK_VDEC_MT8186: >>+ cfg->max = V4L2_MPEG_VIDEO_H264_LEVEL_4_2; >>+ break; >>+ default: >>+ cfg->max = V4L2_MPEG_VIDEO_H264_LEVEL_4_1; >>+ break; >>+ }; >>+} >>+ >>+static void mtk_vcodec_dec_reset_controls(struct v4l2_ctrl_config *cfg, >>+ struct mtk_vcodec_dec_ctx *ctx) >>+{ >>+ switch (cfg->id) { >>+ case V4L2_CID_MPEG_VIDEO_H264_LEVEL: >>+ mtk_vcodec_dec_fill_h264_level(cfg, ctx); >>+ mtk_v4l2_vdec_dbg(3, ctx, "h264 supported level: %lld %lld", cfg->max, cfg->def); >>+ break; >>+ default: >>+ break; >>+ }; >>+} >>+ >>static int mtk_vcodec_dec_ctrls_setup(struct mtk_vcodec_dec_ctx *ctx) >>{ >> unsigned int i; >>@@ -532,6 +575,8 @@ static int mtk_vcodec_dec_ctrls_setup(struct mtk_vcodec_dec_ctx *ctx) >> for (i = 0; i < NUM_CTRLS; i++) { >> struct v4l2_ctrl_config cfg = mtk_stateless_controls[i].cfg; >> cfg.ops = &mtk_vcodec_dec_ctrl_ops; >>+ >>+ mtk_vcodec_dec_reset_controls(&cfg, ctx); >> v4l2_ctrl_new_custom(&ctx->ctrl_hdl, &cfg, NULL); >> if (ctx->ctrl_hdl.error) { >> mtk_v4l2_vdec_err(ctx, "Adding control %d failed %d", i, >>-- >>2.18.0 >>
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