Messages in this thread | | | Date | Fri, 20 Oct 2023 15:12:44 +0530 | Subject | Re: [PATCH v13 01/10] usb: dwc3: core: Access XHCI address space temporarily to read port info | From | Krishna Kurapati PSSNV <> |
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On 10/20/2023 2:02 PM, Johan Hovold wrote: > On Sat, Oct 07, 2023 at 09:17:57PM +0530, Krishna Kurapati wrote: >> Currently host-only capable DWC3 controllers support Multiport. > > You use the word "currently" in a few places like this (e.g. in comments > in the code). What exactly do you mean? That all current multiport > controllers are host-only, or that this is all that the driver supports > after your changes? > This means that, today the capable multiport controllers are host-only capable, not that the driver is designed that way.
> Please rephrase accordingly throughout so that this becomes clear. > > In any case it looks like the above sentence is at least missing an > "only". > >> +static int dwc3_read_port_info(struct dwc3 *dwc) >> +{ >> + void __iomem *base; >> + u8 major_revision; >> + u32 offset = 0; > > I'd move the initialisation just before the loop. > >> + u32 val; >> + >> + /* >> + * Remap xHCI address space to access XHCI ext cap regs, > > Drop comma and merge with next line and break it closer to 80 chars > (instead of 65). > >> + * since it is needed to get port info. > > s/since it is needed to get/which hold the/? > >> + */ >> + base = ioremap(dwc->xhci_resources[0].start, >> + resource_size(&dwc->xhci_resources[0])); >> + if (IS_ERR(base)) >> + return PTR_ERR(base); >> + >> + do { >> + offset = xhci_find_next_ext_cap(base, offset, >> + XHCI_EXT_CAPS_PROTOCOL); >> + if (!offset) >> + break; >> + >> + val = readl(base + offset); >> + major_revision = XHCI_EXT_PORT_MAJOR(val); >> + >> + val = readl(base + offset + 0x08); >> + if (major_revision == 0x03) { >> + dwc->num_usb3_ports += XHCI_EXT_PORT_COUNT(val); >> + } else if (major_revision <= 0x02) { >> + dwc->num_usb2_ports += XHCI_EXT_PORT_COUNT(val); >> + } else { >> + dev_err(dwc->dev, > > This should be dev_warn() (as in the xhci driver) now that you no longer > treat it as a fatal error. > >> + "Unrecognized port major revision %d\n", > > Merge this with the previous line (even if it makes that line 83 chars). > > Use a lower case 'U' for consistency with most of the error messages. > Sure, will change this to dev_warn and modify the "u".
>> + major_revision); >> + } >> + } while (1); >> + >> + dev_dbg(dwc->dev, "hs-ports: %u ss-ports: %u\n", >> + dwc->num_usb2_ports, dwc->num_usb3_ports); >> + >> + iounmap(base); >> + >> + return 0; >> +} >> + >> static int dwc3_probe(struct platform_device *pdev) >> { >> struct device *dev = &pdev->dev; >> @@ -1846,6 +1892,7 @@ static int dwc3_probe(struct platform_device *pdev) >> void __iomem *regs; >> struct dwc3 *dwc; >> int ret; >> + unsigned int hw_mode; > > Nit: I'd place this one before ret. > >> >> dwc = devm_kzalloc(dev, sizeof(*dwc), GFP_KERNEL); >> if (!dwc) >> @@ -1926,6 +1973,20 @@ static int dwc3_probe(struct platform_device *pdev) >> goto err_disable_clks; >> } >> >> + /* >> + * Currently only DWC3 controllers that are host-only capable >> + * support Multiport. >> + */ > > So is this is a limitation of the hardware or implementation? >
This is how the hardware is implemented today. I wanted to convey that "lets check for host-only condition before going for reading port info"
>> + hw_mode = DWC3_GHWPARAMS0_MODE(dwc->hwparams.hwparams0); >> + if (hw_mode == DWC3_GHWPARAMS0_MODE_HOST) { >> + ret = dwc3_read_port_info(dwc); >> + if (ret) >> + goto err_disable_clks; >> + } else { >> + dwc->num_usb2_ports = 1; >> + dwc->num_usb3_ports = 1; >> + } >> + >> spin_lock_init(&dwc->lock); >> mutex_init(&dwc->mutex); > > Johan >
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