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    SubjectRe: [PATCH v2] PCI: keystone: Fix ks_pcie_v3_65_add_bus() for AM654x SoC
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    On 19/10/23 10:14, Siddharth Vadapalli wrote:
    > Hello Bjorn,
    >
    > On 18/10/23 22:06, Bjorn Helgaas wrote:
    >> [+cc Serge (please cc people who have commented on previous revisions)]
    >
    > Sure, I will do so.
    >

    ...

    >
    > Yes, I will follow Serge's suggestion of adding a new pci_ops structure for the
    > AM654x SoC which uses the new 4.90a controller. I have described it at:
    > https://lore.kernel.org/r/ba217723-1501-4e72-b143-e0047266ea9a@ti.com/
    > and am summarizing it below:
    >
    > I will add the following:
    > static struct pci_ops ks_pcie_am6_ops = {
    > .map_bus = dw_pcie_own_conf_map_bus,
    > .read = pci_generic_config_read,
    > .write = pci_generic_config_write,
    > };
    > which shall be used for AM654x SoC
    >
    > I will also modify the contents of ks_pcie_host_init() as follows:
    > if(ks_pcie->is_am6)
    > pp->bridge->ops = &ks_pcie_am6_ops;
    > else
    > pp->bridge->ops = &ks_pcie_ops;
    >
    > which will ensure that the .add_bus() method is no longer applicable to the
    > AM654x SoC, which was the case prior to commit 6ab15b5e7057.
    >
    > I shall post the v3 patch with the above changes and also Cc Serge.

    I have posted the v3 patch at:
    https://lore.kernel.org/r/20231019081330.2975470-1-s-vadapalli@ti.com/
    and have copied Serge in the mail.

    >

    --
    Regards,
    Siddharth.

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