Messages in this thread | | | Date | Thu, 19 Oct 2023 19:05:58 +0000 | From | Oliver Upton <> | Subject | Re: [PATCH v7 03/12] KVM: arm64: PMU: Clear PM{C,I}NTEN{SET,CLR} and PMOVS{SET,CLR} on vCPU reset |
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Hi Raghu,
Can you please make sure you include leading and trailing whitespace for your inline replies? The message gets extremely dense and is difficult to read.
Also -- delete any unrelated context from your replies. If there's a localized conversation about a particular detail there's no reason to keep the entire thread in the body.
On Thu, Oct 19, 2023 at 11:46:22AM -0700, Raghavendra Rao Ananta wrote: > On Wed, Oct 18, 2023 at 2:16 PM Raghavendra Rao Ananta > <rananta@google.com> wrote: > > I had a brief discussion about this with Oliver, and it looks like we > > might need a couple of additional changes for these register accesses: > > - For the userspace accesses, we have to implement explicit get_user > > and set_user callbacks that to filter out the unimplemented counters > > using kvm_pmu_valid_counter_mask(). > Re-thinking the first case: Since these registers go through a reset > (reset_pmu_reg()) during initialization, where the valid counter mask > is applied, and since we are sanitizing the registers with the mask > before running the guest (below case), will implementing the > {get,set}_user() add any value, apart from just keeping userspace in > sync with every update of PMCR.N?
KVM's sysreg emulation (as seen from userspace) fails to uphold the RES0 bits of these registers. That's a bug.
-- Thanks, Oliver
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