Messages in this thread | | | Date | Wed, 18 Oct 2023 10:42:31 +0200 | Subject | Re: [PATCH v2 3/3] cpufreq: qcom-nvmem: Add MSM8909 | From | Konrad Dybcio <> |
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On 10/18/23 10:06, Stephan Gerhold wrote: > When the MSM8909 SoC is used together with the PM8909 PMIC the primary > power supply for the CPU (VDD_APC) is shared with other components to > the SoC, namely the VDD_CX power domain typically supplied by the PM8909 > S1 regulator. This means that all votes for necessary performance states > go via the RPM firmware which collects the requirements from all the > processors in the SoC. The RPM firmware then chooses the actual voltage > based on the performance states ("corners"), depending on calibration > values in the NVMEM and other factors. > > The MSM8909 SoC is also sometimes used with the PM8916 or PM660 PMIC. > In that case there is a dedicated regulator connected to VDD_APC and > Linux is responsible to do adaptive voltage scaling using CPR (similar > to the existing code for QCS404). > > This difference can be described in the device tree, by either assigning > the CPU a power domain from RPMPD or from the CPR driver. > > Describe this using "perf" as generic power domain name, which is also > used already for SCMI based platforms. > > Also add a simple function that reads the speedbin from a NVMEM cell > and sets it as-is for opp-supported-hw. The actual bit position can be > described in the device tree without additional driver changes. > > Signed-off-by: Stephan Gerhold <stephan.gerhold@kernkonzept.com> > --- Acked-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Konrad
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