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    Subject[PATCH v2 01/19] riscv: hwprobe: factorize hwprobe ISA extension reporting
    Date
    Factorize ISA extension reporting by using a macro rather than
    copy/pasting extension names. This will allow adding new extensions more
    easily.

    Signed-off-by: Clément Léger <cleger@rivosinc.com>
    ---
    arch/riscv/kernel/sys_riscv.c | 32 ++++++++++++++++++--------------
    1 file changed, 18 insertions(+), 14 deletions(-)

    diff --git a/arch/riscv/kernel/sys_riscv.c b/arch/riscv/kernel/sys_riscv.c
    index 473159b5f303..e207874e686e 100644
    --- a/arch/riscv/kernel/sys_riscv.c
    +++ b/arch/riscv/kernel/sys_riscv.c
    @@ -145,20 +145,24 @@ static void hwprobe_isa_ext0(struct riscv_hwprobe *pair,
    for_each_cpu(cpu, cpus) {
    struct riscv_isainfo *isainfo = &hart_isa[cpu];

    - if (riscv_isa_extension_available(isainfo->isa, ZBA))
    - pair->value |= RISCV_HWPROBE_EXT_ZBA;
    - else
    - missing |= RISCV_HWPROBE_EXT_ZBA;
    -
    - if (riscv_isa_extension_available(isainfo->isa, ZBB))
    - pair->value |= RISCV_HWPROBE_EXT_ZBB;
    - else
    - missing |= RISCV_HWPROBE_EXT_ZBB;
    -
    - if (riscv_isa_extension_available(isainfo->isa, ZBS))
    - pair->value |= RISCV_HWPROBE_EXT_ZBS;
    - else
    - missing |= RISCV_HWPROBE_EXT_ZBS;
    +#define CHECK_ISA_EXT(__ext) \
    + do { \
    + if (riscv_isa_extension_available(isainfo->isa, __ext)) \
    + pair->value |= RISCV_HWPROBE_EXT_##__ext; \
    + else \
    + missing |= RISCV_HWPROBE_EXT_##__ext; \
    + } while (false)
    +
    + /*
    + * Only use CHECK_ISA_EXT() for extensions which can be exposed
    + * to userspace, regardless of the kernel's configuration, as no
    + * other checks, besides presence in the hart_isa bitmap, are
    + * made.
    + */
    + CHECK_ISA_EXT(ZBA);
    + CHECK_ISA_EXT(ZBB);
    + CHECK_ISA_EXT(ZBS);
    +#undef CHECK_ISA_EXT
    }

    /* Now turn off reporting features if any CPU is missing it. */
    --
    2.42.0
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      Last update: 2023-10-17 15:16    [W:4.532 / U:0.012 seconds]
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