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    SubjectRe: [PATCH 2/3] PCI: layerscape: add suspend/resume for ls1021a
    On Fri, Sep 15, 2023 at 02:43:05PM -0400, Frank Li wrote:
    > ls1021a add suspend/resume support.
    >

    Please add what the driver is doing during suspend/resume.

    > Signed-off-by: Frank Li <Frank.Li@nxp.com>
    > ---
    > drivers/pci/controller/dwc/pci-layerscape.c | 88 ++++++++++++++++++++-
    > 1 file changed, 87 insertions(+), 1 deletion(-)
    >
    > diff --git a/drivers/pci/controller/dwc/pci-layerscape.c b/drivers/pci/controller/dwc/pci-layerscape.c
    > index 20c48c06e2248..bc5a8ff1a26ce 100644
    > --- a/drivers/pci/controller/dwc/pci-layerscape.c
    > +++ b/drivers/pci/controller/dwc/pci-layerscape.c
    > @@ -35,6 +35,12 @@
    > #define PF_MCR_PTOMR BIT(0)
    > #define PF_MCR_EXL2S BIT(1)
    >
    > +/* LS1021A PEXn PM Write Control Register */
    > +#define SCFG_PEXPMWRCR(idx) (0x5c + (idx) * 0x64)
    > +#define PMXMTTURNOFF BIT(31)
    > +#define SCFG_PEXSFTRSTCR 0x190
    > +#define PEXSR(idx) BIT(idx)
    > +
    > #define PCIE_IATU_NUM 6
    >
    > struct ls_pcie_drvdata {
    > @@ -48,6 +54,8 @@ struct ls_pcie {
    > struct dw_pcie *pci;
    > const struct ls_pcie_drvdata *drvdata;
    > void __iomem *pf_base;
    > + struct regmap *scfg;
    > + int index;
    > bool big_endian;
    > };
    >
    > @@ -170,13 +178,91 @@ static int ls_pcie_host_init(struct dw_pcie_rp *pp)
    > return 0;
    > }
    >
    > +static void ls1021a_pcie_send_turnoff_msg(struct dw_pcie_rp *pp)
    > +{
    > + struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
    > + struct ls_pcie *pcie = to_ls_pcie(pci);
    > + u32 val;
    > +
    > + if (!pcie->scfg) {

    Can this ever happen?

    > + dev_dbg(pcie->pci->dev, "SYSCFG is NULL\n");
    > + return;
    > + }
    > +
    > + /* Send Turn_off message */

    "Send PME_Turn_Off message"

    > + regmap_read(pcie->scfg, SCFG_PEXPMWRCR(pcie->index), &val);
    > + val |= PMXMTTURNOFF;
    > + regmap_write(pcie->scfg, SCFG_PEXPMWRCR(pcie->index), val);
    > +
    > + /* There are not register to check ACK, so wait PCIE_PME_TO_L2_TIMEOUT_US */

    "There is no specific register to check for PME_To_Ack from endpoint. So on the
    safe side, wait for PCIE_PME_TO_L2_TIMEOUT_US."

    > + mdelay(PCIE_PME_TO_L2_TIMEOUT_US/1000);
    > +
    > + /* Clear Turn_off message */

    "PME_Turn_off". But I'm not sure if this is really required. Are you doing it
    because the layerspace hw implements the PME_Turn_Off bit as "level triggered"?

    > + regmap_read(pcie->scfg, SCFG_PEXPMWRCR(pcie->index), &val);
    > + val &= ~PMXMTTURNOFF;
    > + regmap_write(pcie->scfg, SCFG_PEXPMWRCR(pcie->index), val);
    > +}
    > +
    > +static void ls1021a_pcie_exit_from_l2(struct dw_pcie_rp *pp)
    > +{
    > + struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
    > + struct ls_pcie *pcie = to_ls_pcie(pci);
    > + u32 val;
    > +

    A comment here would be good.

    > + regmap_read(pcie->scfg, SCFG_PEXSFTRSTCR, &val);
    > + val |= PEXSR(pcie->index);
    > + regmap_write(pcie->scfg, SCFG_PEXSFTRSTCR, val);
    > +
    > + regmap_read(pcie->scfg, SCFG_PEXSFTRSTCR, &val);
    > + val &= ~PEXSR(pcie->index);
    > + regmap_write(pcie->scfg, SCFG_PEXSFTRSTCR, val);
    > +}
    > +
    > +static int ls1021a_pcie_host_init(struct dw_pcie_rp *pp)
    > +{
    > + struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
    > + struct ls_pcie *pcie = to_ls_pcie(pci);
    > + struct device *dev = pcie->pci->dev;
    > + u32 index[2];
    > + int ret;
    > +
    > + ret = ls_pcie_host_init(pp);
    > + if (ret)
    > + return ret;
    > +
    > + pcie->scfg = syscon_regmap_lookup_by_phandle(dev->of_node, "fsl,pcie-scfg");
    > + if (IS_ERR(pcie->scfg)) {
    > + ret = PTR_ERR(pcie->scfg);
    > + dev_err(dev, "No syscfg phandle specified\n");
    > + pcie->scfg = NULL;
    > + return ret;
    > + }
    > +
    > + ret = of_property_read_u32_array(dev->of_node, "fsl,pcie-scfg", index, 2);
    > + if (ret) {
    > + pcie->scfg = NULL;
    > + return ret;
    > + }
    > +
    > + pcie->index = index[1];
    > +

    The above syscon parsing could be done conditionally during probe itself. There
    is no need to do it during host_init() time.

    - Mani

    > + return ret;
    > +}
    > +
    > static const struct dw_pcie_host_ops ls_pcie_host_ops = {
    > .host_init = ls_pcie_host_init,
    > .pme_turn_off = ls_pcie_send_turnoff_msg,
    > };
    >
    > +static const struct dw_pcie_host_ops ls1021a_pcie_host_ops = {
    > + .host_init = ls1021a_pcie_host_init,
    > + .pme_turn_off = ls1021a_pcie_send_turnoff_msg,
    > +};
    > +
    > static const struct ls_pcie_drvdata ls1021a_drvdata = {
    > - .pm_support = false,
    > + .pm_support = true,
    > + .ops = &ls1021a_pcie_host_ops,
    > + .exit_from_l2 = ls1021a_pcie_exit_from_l2,
    > };
    >
    > static const struct ls_pcie_drvdata layerscape_drvdata = {
    > --
    > 2.34.1
    >

    --
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