Messages in this thread | | | Date | Tue, 10 Oct 2023 19:13:40 +0200 | From | Greg Kroah-Hartman <> | Subject | Re: [PATCH 2/6] RISC-V: KVM: Change the SBI specification version to v2.0 |
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On Tue, Oct 10, 2023 at 10:34:59PM +0530, Anup Patel wrote: > We will be implementing SBI DBCN extension for KVM RISC-V so let > us change the KVM RISC-V SBI specification version to v2.0. > > Signed-off-by: Anup Patel <apatel@ventanamicro.com> > --- > arch/riscv/include/asm/kvm_vcpu_sbi.h | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/riscv/include/asm/kvm_vcpu_sbi.h b/arch/riscv/include/asm/kvm_vcpu_sbi.h > index cdcf0ff07be7..8d6d4dce8a5e 100644 > --- a/arch/riscv/include/asm/kvm_vcpu_sbi.h > +++ b/arch/riscv/include/asm/kvm_vcpu_sbi.h > @@ -11,7 +11,7 @@ > > #define KVM_SBI_IMPID 3 > > -#define KVM_SBI_VERSION_MAJOR 1 > +#define KVM_SBI_VERSION_MAJOR 2
What does this number mean? Who checks it? Why do you have to keep incrementing it?
thanks,
greg k-h
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