Messages in this thread | ![/](/images/icornerl.gif) | | Date | Wed, 4 Jan 2023 17:26:19 +0000 | Subject | Re: [PATCH v5 1/6] perf vendor events arm64: Add topdown L1 metrics for neoverse-n2 | From | John Garry <> |
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On 04/01/2023 05:05, Jing Zhang wrote: > > > 在 2023/1/3 下午7:52, John Garry 写道: >> On 03/01/2023 11:39, Jing Zhang wrote: >>> The formula of topdown L1 on neoverse-n2 is from ARM sbsa7.0 platform >>> design document [0], D37-38. >> >> I think that I mentioned this before - if the these metrics are coming from an sbsa doc, then they are standard. As such, we can make them "arch std events" and put them in a common json such as sbsa.json, so that other cores may reuse. >> >> You don't strictly have to do do this now, but it would be better. >> > > Hi John,
Hi Jing,
> > I would really like to do this, but as discussed earlier, slot is different on each architectures. > If I do not specify the value of the slot in sbsa.json, then in the json file of n2/v1, I need to > overwrite each topdown "MetricExpr". In other words, the metrics placed in the sbsa.json file only > reuse "BriefDescription", "MetricGroup" and "ScaleUnit". So I'm not sure if it's acceptable?
I don't see a lot of value in that really.
However, for this value of slot, isn't this discoverable from a system register per core? Quoting the sbsa: "The IMPLEMENTATION DEFINED constant SLOTS is discoverable from the system register PMMIR_EL1.SLOTS." Did you consider how this could be used?
> > In addition, James mentioned that if the units and names and group names of different architectures > are not unified, it will become complicated. >
Thanks, John
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