Messages in this thread | ![/](/images/icornerl.gif) | | Date | Tue, 31 Jan 2023 15:53:20 +0800 | Subject | Re: [PATCH 1/1] iommu/vt-d: Set No Execute Enable bit in PASID table entry | From | Baolu Lu <> |
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On 2023/1/26 17:54, Lu Baolu wrote: > Setup No Execute Enable bit (Bit 133) of a scalable mode PASID > entry. It is required when XD bit of the first level page table > entry is about to be set. > > Fixes: ddf09b6d43ec ("iommu/vt-d: Setup pasid entries for iova over first level") > Signed-off-by: Ashok Raj<ashok.raj@intel.com> > Signed-off-by: Lu Baolu<baolu.lu@linux.intel.com>
Patch queued for v6.3.
https://lore.kernel.org/linux-iommu/20230131073740.378984-1-baolu.lu@linux.intel.com/
Best regards, baolu
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