Messages in this thread Patch in this message | | | From | Ashok Raj <> | Subject | [Patch v3 Part2 8/9] x86/microcode/intel: Drop wbinvd() from microcode loading | Date | Mon, 30 Jan 2023 13:39:54 -0800 |
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Some older processors had a bad interaction when updating microcode if the caches were dirty causing machine checks. The wbinvd() was added to mitigate that before performing microcode updates. Now that Linux checks for the minimum version before performing an update, those microcode revisions can't be loaded.
Early loading is also not required to use wbinvd() any longer, that was added as a safety net.
Remove calls to wbinvd().
Signed-off-by: Ashok Raj <ashok.raj@intel.com> Reviewed-by: Tony Luck <tony.luck@intel.com> Cc: LKML <linux-kernel@vger.kernel.org> Cc: x86 <x86@kernel.org> Cc: Ingo Molnar <mingo@kernel.org> Cc: Tony Luck <tony.luck@intel.com> Cc: Dave Hansen <dave.hansen@intel.com> Cc: Alison Schofield <alison.schofield@intel.com> Cc: Reinette Chatre <reinette.chatre@intel.com> Cc: Thomas Gleixner (Intel) <tglx@linutronix.de> Cc: Tom Lendacky <thomas.lendacky@amd.com> Cc: Stefan Talpalaru <stefantalpalaru@yahoo.com> Cc: David Woodhouse <dwmw2@infradead.org> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Jonathan Corbet <corbet@lwn.net> Cc: Rafael J. Wysocki <rafael@kernel.org> Cc: Peter Zilstra (Intel) <peterz@infradead.org> Cc: Andy Lutomirski <luto@kernel.org> Cc: Andrew Cooper <Andrew.Cooper3@citrix.com> Cc: Boris Ostrovsky <boris.ostrovsky@oracle.com> Cc: Martin Pohlack <mpohlack@amazon.de> --- arch/x86/kernel/cpu/microcode/intel.c | 12 ------------ 1 file changed, 12 deletions(-)
diff --git a/arch/x86/kernel/cpu/microcode/intel.c b/arch/x86/kernel/cpu/microcode/intel.c index 98c92b9affa2..601c586be7b6 100644 --- a/arch/x86/kernel/cpu/microcode/intel.c +++ b/arch/x86/kernel/cpu/microcode/intel.c @@ -415,12 +415,6 @@ static int apply_microcode_early(struct ucode_cpu_info *uci, bool early) old_rev = rev; - /* - * Writeback and invalidate caches before updating microcode to avoid - * internal issues depending on what the microcode is updating. - */ - native_wbinvd(); - /* write microcode via MSR 0x79 */ native_wrmsrl(MSR_IA32_UCODE_WRITE, (unsigned long)mc->bits); @@ -632,12 +626,6 @@ static enum ucode_state apply_microcode_intel(int cpu) goto out; } - /* - * Writeback and invalidate caches before updating microcode to avoid - * internal issues depending on what the microcode is updating. - */ - native_wbinvd(); - /* write microcode via MSR 0x79 */ wrmsrl(MSR_IA32_UCODE_WRITE, (unsigned long)mc->bits); -- 2.37.2
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