Messages in this thread Patch in this message | | | Date | Tue, 24 Jan 2023 14:39:19 +0000 | From | Conor Dooley <> | Subject | Re: [PATCH v4 6/6] arch_topology: Build cacheinfo from primary CPU |
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On Tue, Jan 24, 2023 at 02:04:20PM +0000, Sudeep Holla wrote: > Conor might help me remember the details.
And I can't shirk either since you know I just replied to Pierre!
> On Tue, Jan 24, 2023 at 02:50:16PM +0100, Geert Uytterhoeven wrote:
> > > @@ -840,6 +840,14 @@ void __init init_cpu_topology(void) > > > reset_cpu_topology(); > > > return; > > > } > > > + > > > + for_each_possible_cpu(cpu) { > > > + ret = fetch_cache_info(cpu); > > > + if (ret) { > > > + pr_err("Early cacheinfo failed, ret = %d\n", ret); > > > > This triggers on all my RV64 platforms (K210, Icicle, Starlight, > > RZ/Five). > > > > This seems to be a respin of > > https://lore.kernel.org/all/CAMuHMdUBZ791fxCPkKQ6HCwLE4GJB2S35QC=SQ+X8w5Q4C_70g@mail.gmail.com > > which had the same issue. > > > > I need to recollect my memories reading all the thread, but even after the > fixes there were few platforms that failed with so early allocation but were > fine with initcalls. Are these such platforms or am I mixing up things here ? > Do you still see all the cacheinfo in the sysfs with initcalls that happen > later in the boot ?
IIRC that stuff was failing back then because riscv calls init_cpu_topology() far sooner in boot than arm64 does, and therefore caused allocation failures. You made that warning go away in the below patch by moving detect_cache_attributes() to update_siblings_masks(), which both arches call later during boot IIRC: https://lore.kernel.org/all/20220713133344.1201247-1-sudeep.holla@arm.com
Pierre's patch has added fetch_cache_info() to the problematic init_cpu_topology() which is called before we can actually do any allocation in smp_prepare_boot_cpu() or something like that.
That's what I get for only reviewing the patch that was specifically for riscv, and not the rest of the series... D'oh.
This actually came up a few weeks ago, although I kinda considered the reason it was triggered to be a bit bogus there, since that dmips property is not (yet?) a valid property on RISC-V. The patch for that is here: https://patchwork.kernel.org/project/linux-riscv/patch/20230105033705.3946130-1-leyfoon.tan@starfivetech.com/ I tried it on a PolarFire SoC (unfortunately not an Icicle, I just went and bricked mine an hour ago) & it should be a fix for this problem too.
My suggested commit message for that is somewhat prophetic now that I look back at it: https://lore.kernel.org/all/Y7V4byskevAWKM3G@spud/
I'll ping Palmer about that patch I guess... Cheers, Conor.
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