Messages in this thread | ![/](/images/icornerl.gif) | | Date | Fri, 20 Jan 2023 22:22:25 +0100 | Subject | Re: [PATCH v6 1/2] arm64: dts: qcom: Add base QDU1000/QRU1000 DTSIs | From | Konrad Dybcio <> |
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On 12.01.2023 22:07, Melody Olvera wrote: > Add the base DTSI files for QDU1000 and QRU1000 SoCs, including base > descriptions of CPUs, GCC, RPMHCC, QUP, TLMM, and interrupt-controller > to boot to shell with console on these SoCs. > > Signed-off-by: Melody Olvera <quic_molvera@quicinc.com> > ---
[...] > + > + arch_timer: timer { Unused label
Otherwise:
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Konrad
> + compatible = "arm,armv8-timer"; > + interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, > + <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, > + <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, > + <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, > + <GIC_PPI 12 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>; > + }; > +}; > diff --git a/arch/arm64/boot/dts/qcom/qru1000.dtsi b/arch/arm64/boot/dts/qcom/qru1000.dtsi > new file mode 100644 > index 000000000000..eac5dc54a8ab > --- /dev/null > +++ b/arch/arm64/boot/dts/qcom/qru1000.dtsi > @@ -0,0 +1,26 @@ > +// SPDX-License-Identifier: BSD-3-Clause > +/* > + * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. > + */ > + > +#include "qdu1000.dtsi" > +/delete-node/ &tenx_mem; > +/delete-node/ &oem_tenx_mem; > +/delete-node/ &tenx_q6_buffer_mem; > + > +&reserved_memory { > + oem_tenx_mem: oem-tenx@a0000000 { > + reg = <0x0 0xa0000000 0x0 0x6400000>; > + no-map; > + }; > + > + mpss_diag_buffer_mem: mpss-diag-buffer@aea00000 { > + reg = <0x0 0xaea00000 0x0 0x6400000>; > + no-map; > + }; > + > + tenx_q6_buffer_mem: tenx-q6-buffer@b4e00000 { > + reg = <0x0 0xb4e00000 0x0 0x3200000>; > + no-map; > + }; > +};
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