Messages in this thread | | | Date | Thu, 12 Jan 2023 11:35:59 +0100 | From | Peter Zijlstra <> | Subject | Re: [RFC][PATCH 05/12] arch: Introduce arch_{,try_}_cmpxchg128{,_local}() |
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On Mon, Jan 09, 2023 at 06:50:24PM +0000, Mark Rutland wrote:
> Similarly, I'd suggest: > > | #define __CMPXCHG128(name, mb, cl...) \ > | static __always_inline u128 \ > | __lse__cmpxchg128##name(volatile u128 *ptr, u128 old, u128 new) \ > | { \ > | asm volatile( \ > | __LSE_PREAMBLE \ > | " casp" #mb "\t%[old], %H[old], %[new], %H[new], %[v]\n" \ > | : [old] "+&r" (old), \ > | [v] "+Q" (*(u128 *)ptr) \ > | : [new] "r" (new) \ > | : cl); \ > | \ > | return old; \ > | } > | > | __CMPXCHG128( , ) > | __CMPXCHG128(_mb, al, "memory") > | > | #undef __CMPXCHG128
clang-16 seems to hate on this like:
arch/arm64/include/asm/atomic_lse.h:342:1: warning: value size does not match register size specified by the constraint and modifier [-Wasm-operand-widths] arch/arm64/include/asm/atomic_lse.h:334:17: note: expanded from macro '__CMPXCHG128' : [old] "+&r" (old), \ ^
(much the same for the ll_sc version; if you want the full build thing, holler and I'll bounce you the robot mail).
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