Messages in this thread | | | Date | Wed, 2 Jun 2021 10:20:16 +0200 | From | Peter Zijlstra <> | Subject | Re: [PATCH] x86/alternative: Align insn bytes vertically |
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On Tue, Jun 01, 2021 at 09:37:13PM +0200, Borislav Petkov wrote: > From: Borislav Petkov <bp@suse.de> > > For easier inspection which bytes have changed. > > For example: > > feat: 7*32+12, old: (__x86_indirect_thunk_r10+0x0/0x20 (ffffffff81c02480) len: 17), repl: (ffffffff897813aa, len: 17) > ffffffff81c02480: old_insn: 41 ff e2 90 90 90 90 90 90 90 90 90 90 90 90 90 90 > ffffffff897813aa: rpl_insn: e8 07 00 00 00 f3 90 0f ae e8 eb f9 4c 89 14 24 c3 > ffffffff81c02480: final_insn: e8 07 00 00 00 f3 90 0f ae e8 eb f9 4c 89 14 24 c3 > > No functional changes. > > Signed-off-by: Borislav Petkov <bp@suse.de>
Nice!
Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org>
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