Messages in this thread | | | Subject | Re: [PATCH for 4.16 v7 02/11] powerpc: membarrier: Skip memory barrier in switch_mm() | From | Christophe Leroy <> | Date | Sat, 19 Jun 2021 11:35:34 +0200 |
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Le 18/06/2021 à 19:26, Mathieu Desnoyers a écrit : > ----- On Jun 18, 2021, at 1:13 PM, Christophe Leroy christophe.leroy@csgroup.eu wrote: > [...] >> >> I don't understand all that complexity to just replace a simple >> 'smp_mb__after_unlock_lock()'. >> >> #define smp_mb__after_unlock_lock() smp_mb() >> #define smp_mb() barrier() >> # define barrier() __asm__ __volatile__("": : :"memory") >> >> >> Am I missing some subtility ? > > On powerpc CONFIG_SMP, smp_mb() is actually defined as: > > #define smp_mb() __smp_mb() > #define __smp_mb() mb() > #define mb() __asm__ __volatile__ ("sync" : : : "memory") > > So the original motivation here was to skip a "sync" instruction whenever > switching between threads which are part of the same process. But based on > recent discussions, I suspect my implementation may be inaccurately doing > so though. >
I see.
Then, if you think a 'sync' is a concern, shouldn't we try and remove the forest of 'sync' in the I/O accessors ?
I can't really understand why we need all those 'sync' and 'isync' and 'twi' around the accesses whereas I/O memory is usually mapped as 'Guarded' so memory access ordering is already garantied.
I'm sure we'll save a lot with that.
Christophe
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