lkml.org 
[lkml]   [2021]   [Dec]   [6]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
    Patch in this message
    /
    From
    Subject[PATCH 5.15 088/207] net: dsa: mv88e6xxx: Add fix for erratum 5.2 of 88E6393X family
    Date
    From: Marek Behún <kabel@kernel.org>

    commit 93fd8207bed80ce19aaf59932cbe1c03d418a37d upstream.

    Add fix for erratum 5.2 of the 88E6393X (Amethyst) family: for 10gbase-r
    mode, some undocumented registers need to be written some special
    values.

    Fixes: de776d0d316f ("net: dsa: mv88e6xxx: add support for mv88e6393x family")
    Signed-off-by: Marek Behún <kabel@kernel.org>
    Signed-off-by: David S. Miller <davem@davemloft.net>
    Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
    ---
    drivers/net/dsa/mv88e6xxx/serdes.c | 48 +++++++++++++++++++++++++++++++++++++
    1 file changed, 48 insertions(+)

    --- a/drivers/net/dsa/mv88e6xxx/serdes.c
    +++ b/drivers/net/dsa/mv88e6xxx/serdes.c
    @@ -1375,6 +1375,50 @@ static int mv88e6393x_serdes_erratum_4_8
    MV88E6393X_ERRATA_4_8_REG, reg);
    }

    +static int mv88e6393x_serdes_erratum_5_2(struct mv88e6xxx_chip *chip, int lane,
    + u8 cmode)
    +{
    + static const struct {
    + u16 dev, reg, val, mask;
    + } fixes[] = {
    + { MDIO_MMD_VEND1, 0x8093, 0xcb5a, 0xffff },
    + { MDIO_MMD_VEND1, 0x8171, 0x7088, 0xffff },
    + { MDIO_MMD_VEND1, 0x80c9, 0x311a, 0xffff },
    + { MDIO_MMD_VEND1, 0x80a2, 0x8000, 0xff7f },
    + { MDIO_MMD_VEND1, 0x80a9, 0x0000, 0xfff0 },
    + { MDIO_MMD_VEND1, 0x80a3, 0x0000, 0xf8ff },
    + { MDIO_MMD_PHYXS, MV88E6393X_SERDES_POC,
    + MV88E6393X_SERDES_POC_RESET, MV88E6393X_SERDES_POC_RESET },
    + };
    + int err, i;
    + u16 reg;
    +
    + /* mv88e6393x family errata 5.2:
    + * For optimal signal integrity the following sequence should be applied
    + * to SERDES operating in 10G mode. These registers only apply to 10G
    + * operation and have no effect on other speeds.
    + */
    + if (cmode != MV88E6393X_PORT_STS_CMODE_10GBASER)
    + return 0;
    +
    + for (i = 0; i < ARRAY_SIZE(fixes); ++i) {
    + err = mv88e6390_serdes_read(chip, lane, fixes[i].dev,
    + fixes[i].reg, &reg);
    + if (err)
    + return err;
    +
    + reg &= ~fixes[i].mask;
    + reg |= fixes[i].val;
    +
    + err = mv88e6390_serdes_write(chip, lane, fixes[i].dev,
    + fixes[i].reg, reg);
    + if (err)
    + return err;
    + }
    +
    + return 0;
    +}
    +
    int mv88e6393x_serdes_power(struct mv88e6xxx_chip *chip, int port, int lane,
    bool on)
    {
    @@ -1389,6 +1433,10 @@ int mv88e6393x_serdes_power(struct mv88e
    if (err)
    return err;

    + err = mv88e6393x_serdes_erratum_5_2(chip, lane, cmode);
    + if (err)
    + return err;
    +
    err = mv88e6393x_serdes_power_lane(chip, lane, true);
    if (err)
    return err;

    \
     
     \ /
      Last update: 2021-12-06 17:10    [W:5.725 / U:0.028 seconds]
    ©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site