Messages in this thread | | | Date | Thu, 16 Dec 2021 13:07:43 +0000 | From | "Jiaxun Yang" <> | Subject | Re: [PATCH v3 5/6] MIPS: implement architecture-specific 'pci_remap_iospace()' |
| |
在2021年12月16日十二月 上午11:44,Xi Ruoyao写道: > On Sat, 2021-09-25 at 22:32 +0200, Sergio Paracuellos wrote: >> To make PCI IO work we need to properly virtually map IO cpu physical address >> and set this virtual address as the address of the first PCI IO port which >> is set using function 'set_io_port_base()'. >> >> Acked-by: Arnd Bergmann <arnd@arndb.de> >> Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com> > > Hi, > > the change is causing a WARNING on loongson64g-4core-ls7a: > > [ 0.105781] loongson-pci 1a000000.pci: IO > 0x0018020000..0x001803ffff -> > 0x0000020000 > [ 0.105792] loongson-pci 1a000000.pci: MEM > 0x0040000000..0x007fffffff -> > 0x0040000000 > [ 0.105801] ------------[ cut here ]------------ > [ 0.105804] WARNING: CPU: 0 PID: 1 at arch/mips/pci/pci-generic.c:55 > pci_remap_iospace+0x80/0x88 > [ 0.105815] resource start address is not zero > > I'm not sure how to fix this one. > >> --- >> arch/mips/include/asm/pci.h | 2 ++ >> arch/mips/pci/pci-generic.c | 14 ++++++++++++++ >> 2 files changed, 16 insertions(+) >> >> diff --git a/arch/mips/include/asm/pci.h b/arch/mips/include/asm/pci.h >> index 9ffc8192adae..35270984a5f0 100644 >> --- a/arch/mips/include/asm/pci.h >> +++ b/arch/mips/include/asm/pci.h >> @@ -20,6 +20,8 @@ >> #include <linux/list.h> >> #include <linux/of.h> >> >> +#define pci_remap_iospace pci_remap_iospace >> + >> #ifdef CONFIG_PCI_DRIVERS_LEGACY >> >> /* >> diff --git a/arch/mips/pci/pci-generic.c b/arch/mips/pci/pci-generic.c >> index 95b00017886c..18eb8a453a86 100644 >> --- a/arch/mips/pci/pci-generic.c >> +++ b/arch/mips/pci/pci-generic.c >> @@ -46,3 +46,17 @@ void pcibios_fixup_bus(struct pci_bus *bus) >> { >> pci_read_bridge_bases(bus); >> } >> + >> +int pci_remap_iospace(const struct resource *res, phys_addr_t phys_addr) >> +{ >> + unsigned long vaddr; >> + >> + if (res->start != 0) { >> + WARN_ONCE(1, "resource start address is not zero\n"); >> + return -ENODEV; >> + } >> + >> + vaddr = (unsigned long)ioremap(phys_addr, resource_size(res)); >> + set_io_port_base(vaddr); >> + return 0; >> +}
Hi all,
Another way could be keeping a linked list about PIO->PHYS mapping instead of using the single io_port_base variable.
Thanks.
> > -- > Xi Ruoyao <xry111@mengyan1223.wang> > School of Aerospace Science and Technology, Xidian University
-- - Jiaxun
| |