Messages in this thread | | | From | Leo Li <> | Subject | RE: [PATCH v2 05/10] arm64: dts: lx2160a: update PCIe nodes to match rev2 silicon | Date | Tue, 14 Dec 2021 06:14:14 +0000 |
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> -----Original Message----- > From: Shawn Guo <shawnguo@kernel.org> > Sent: Tuesday, December 14, 2021 1:40 PM > To: Leo Li <leoyang.li@nxp.com> > Cc: linux-arm-kernel@lists.infradead.org; linux-kernel@vger.kernel.org; Z.Q. > Hou <zhiqiang.hou@nxp.com> > Subject: Re: [PATCH v2 05/10] arm64: dts: lx2160a: update PCIe nodes to > match rev2 silicon > > On Fri, Dec 03, 2021 at 05:54:41PM -0600, Li Yang wrote: > > The original dts was created based on the non-production rev1 silicon > > which was only used for evaluation. Update the PCIe nodes to align > > with the different controller used in production rev2 silicon. > > > > Signed-off-by: Li Yang <leoyang.li@nxp.com> > > Reviewed-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> > > --- > > .../arm64/boot/dts/freescale/fsl-lx2160a.dtsi | 96 > > +++++++++---------- > > 1 file changed, 48 insertions(+), 48 deletions(-) > > > > diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi > > b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi > > index fcde09f36018..de680521e1d1 100644 > > --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi > > +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi > > @@ -1088,10 +1088,10 @@ sata3: sata@3230000 { > > }; > > > > pcie1: pcie@3400000 { > > - compatible = "fsl,lx2160a-pcie"; > > Drop lx2160a specific compatible for lx2160a SoC?
The lx2160a compatible was defined with the rev1. We will need to create a new rev2 compatible if we want to keep the soc specific compatible.
> > Shawn > > > - reg = <0x00 0x03400000 0x0 0x00100000>, /* > controller registers */ > > - <0x80 0x00000000 0x0 0x00002000>; /* > configuration space */ > > - reg-names = "csr_axi_slave", "config_axi_slave"; > > + compatible = "fsl,ls2088a-pcie"; > > + reg = <0x00 0x03400000 0x0 0x00100000 /* controller > registers */ > > + 0x80 0x00000000 0x0 0x00002000>; /* > configuration space */ > > + reg-names = "regs", "config"; > > interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>, > /* AER interrupt */ > > <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>, /* > PME interrupt */ > > <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; /* > controller interrupt > > */ @@ -1100,26 +1100,26 @@ pcie1: pcie@3400000 { > > #size-cells = <2>; > > device_type = "pci"; > > dma-coherent; > > - apio-wins = <8>; > > - ppio-wins = <8>; > > + num-viewport = <8>; > > bus-range = <0x0 0xff>; > > - ranges = <0x82000000 0x0 0x40000000 0x80 > 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ > > + ranges = <0x81000000 0x0 0x00000000 0x80 > 0x00010000 0x0 0x00010000 > > + 0x82000000 0x0 0x40000000 0x80 0x40000000 > 0x0 0x40000000>; /* > > +non-prefetchable memory */ > > msi-parent = <&its>; > > + iommu-map = <0 &smmu 0 1>; /* This is fixed-up by > u-boot */ > > #interrupt-cells = <1>; > > interrupt-map-mask = <0 0 0 7>; > > interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 109 > IRQ_TYPE_LEVEL_HIGH>, > > <0000 0 0 2 &gic 0 0 GIC_SPI 110 > IRQ_TYPE_LEVEL_HIGH>, > > <0000 0 0 3 &gic 0 0 GIC_SPI 111 > IRQ_TYPE_LEVEL_HIGH>, > > <0000 0 0 4 &gic 0 0 GIC_SPI 112 > IRQ_TYPE_LEVEL_HIGH>; > > - iommu-map = <0 &smmu 0 1>; /* Fixed-up by > bootloader */ > > status = "disabled"; > > }; > > > > pcie2: pcie@3500000 { > > - compatible = "fsl,lx2160a-pcie"; > > - reg = <0x00 0x03500000 0x0 0x00100000>, /* > controller registers */ > > - <0x88 0x00000000 0x0 0x00002000>; /* > configuration space */ > > - reg-names = "csr_axi_slave", "config_axi_slave"; > > + compatible = "fsl,ls2088a-pcie"; > > + reg = <0x00 0x03500000 0x0 0x00100000 /* controller > registers */ > > + 0x88 0x00000000 0x0 0x00002000>; /* > configuration space */ > > + reg-names = "regs", "config"; > > interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>, > /* AER interrupt */ > > <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>, /* > PME interrupt */ > > <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; /* > controller interrupt > > */ @@ -1128,26 +1128,26 @@ pcie2: pcie@3500000 { > > #size-cells = <2>; > > device_type = "pci"; > > dma-coherent; > > - apio-wins = <8>; > > - ppio-wins = <8>; > > + num-viewport = <8>; > > bus-range = <0x0 0xff>; > > - ranges = <0x82000000 0x0 0x40000000 0x88 > 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ > > + ranges = <0x81000000 0x0 0x00000000 0x88 > 0x00010000 0x0 0x00010000 > > + 0x82000000 0x0 0x40000000 0x88 0x40000000 > 0x0 0x40000000>; /* > > +non-prefetchable memory */ > > msi-parent = <&its>; > > + iommu-map = <0 &smmu 0 1>; /* This is fixed-up by > u-boot */ > > #interrupt-cells = <1>; > > interrupt-map-mask = <0 0 0 7>; > > interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 114 > IRQ_TYPE_LEVEL_HIGH>, > > <0000 0 0 2 &gic 0 0 GIC_SPI 115 > IRQ_TYPE_LEVEL_HIGH>, > > <0000 0 0 3 &gic 0 0 GIC_SPI 116 > IRQ_TYPE_LEVEL_HIGH>, > > <0000 0 0 4 &gic 0 0 GIC_SPI 117 > IRQ_TYPE_LEVEL_HIGH>; > > - iommu-map = <0 &smmu 0 1>; /* Fixed-up by > bootloader */ > > status = "disabled"; > > }; > > > > pcie3: pcie@3600000 { > > - compatible = "fsl,lx2160a-pcie"; > > - reg = <0x00 0x03600000 0x0 0x00100000>, /* > controller registers */ > > - <0x90 0x00000000 0x0 0x00002000>; /* > configuration space */ > > - reg-names = "csr_axi_slave", "config_axi_slave"; > > + compatible = "fsl,ls2088a-pcie"; > > + reg = <0x00 0x03600000 0x0 0x00100000 /* controller > registers */ > > + 0x90 0x00000000 0x0 0x00002000>; /* > configuration space */ > > + reg-names = "regs", "config"; > > interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>, > /* AER interrupt */ > > <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>, /* > PME interrupt */ > > <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; /* > controller interrupt > > */ @@ -1156,26 +1156,26 @@ pcie3: pcie@3600000 { > > #size-cells = <2>; > > device_type = "pci"; > > dma-coherent; > > - apio-wins = <256>; > > - ppio-wins = <24>; > > + num-viewport = <256>; > > bus-range = <0x0 0xff>; > > - ranges = <0x82000000 0x0 0x40000000 0x90 > 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ > > + ranges = <0x81000000 0x0 0x00000000 0x90 > 0x00010000 0x0 0x00010000 > > + 0x82000000 0x0 0x40000000 0x90 0x40000000 > 0x0 0x40000000>; /* > > +non-prefetchable memory */ > > msi-parent = <&its>; > > + iommu-map = <0 &smmu 0 1>; /* This is fixed-up by > u-boot */ > > #interrupt-cells = <1>; > > interrupt-map-mask = <0 0 0 7>; > > interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 119 > IRQ_TYPE_LEVEL_HIGH>, > > <0000 0 0 2 &gic 0 0 GIC_SPI 120 > IRQ_TYPE_LEVEL_HIGH>, > > <0000 0 0 3 &gic 0 0 GIC_SPI 121 > IRQ_TYPE_LEVEL_HIGH>, > > <0000 0 0 4 &gic 0 0 GIC_SPI 122 > IRQ_TYPE_LEVEL_HIGH>; > > - iommu-map = <0 &smmu 0 1>; /* Fixed-up by > bootloader */ > > status = "disabled"; > > }; > > > > pcie4: pcie@3700000 { > > - compatible = "fsl,lx2160a-pcie"; > > - reg = <0x00 0x03700000 0x0 0x00100000>, /* > controller registers */ > > - <0x98 0x00000000 0x0 0x00002000>; /* > configuration space */ > > - reg-names = "csr_axi_slave", "config_axi_slave"; > > + compatible = "fsl,ls2088a-pcie"; > > + reg = <0x00 0x03700000 0x0 0x00100000 /* controller > registers */ > > + 0x98 0x00000000 0x0 0x00002000>; /* > configuration space */ > > + reg-names = "regs", "config"; > > interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, > /* AER interrupt */ > > <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, /* > PME interrupt */ > > <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>; /* > controller interrupt > > */ @@ -1184,26 +1184,26 @@ pcie4: pcie@3700000 { > > #size-cells = <2>; > > device_type = "pci"; > > dma-coherent; > > - apio-wins = <8>; > > - ppio-wins = <8>; > > + num-viewport = <8>; > > bus-range = <0x0 0xff>; > > - ranges = <0x82000000 0x0 0x40000000 0x98 > 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ > > + ranges = <0x81000000 0x0 0x00000000 0x98 > 0x00010000 0x0 0x00010000 > > + 0x82000000 0x0 0x40000000 0x98 0x40000000 > 0x0 0x40000000>; /* > > +non-prefetchable memory */ > > msi-parent = <&its>; > > + iommu-map = <0 &smmu 0 1>; /* This is fixed-up by > u-boot */ > > #interrupt-cells = <1>; > > interrupt-map-mask = <0 0 0 7>; > > interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 124 > IRQ_TYPE_LEVEL_HIGH>, > > <0000 0 0 2 &gic 0 0 GIC_SPI 125 > IRQ_TYPE_LEVEL_HIGH>, > > <0000 0 0 3 &gic 0 0 GIC_SPI 126 > IRQ_TYPE_LEVEL_HIGH>, > > <0000 0 0 4 &gic 0 0 GIC_SPI 127 > IRQ_TYPE_LEVEL_HIGH>; > > - iommu-map = <0 &smmu 0 1>; /* Fixed-up by > bootloader */ > > status = "disabled"; > > }; > > > > pcie5: pcie@3800000 { > > - compatible = "fsl,lx2160a-pcie"; > > - reg = <0x00 0x03800000 0x0 0x00100000>, /* > controller registers */ > > - <0xa0 0x00000000 0x0 0x00002000>; /* > configuration space */ > > - reg-names = "csr_axi_slave", "config_axi_slave"; > > + compatible = "fsl,ls2088a-pcie"; > > + reg = <0x00 0x03800000 0x0 0x00100000 /* controller > registers */ > > + 0xa0 0x00000000 0x0 0x00002000>; /* > configuration space */ > > + reg-names = "regs", "config"; > > interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>, > /* AER interrupt */ > > <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>, /* > PME interrupt */ > > <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>; /* > controller interrupt > > */ @@ -1212,26 +1212,26 @@ pcie5: pcie@3800000 { > > #size-cells = <2>; > > device_type = "pci"; > > dma-coherent; > > - apio-wins = <256>; > > - ppio-wins = <24>; > > + num-viewport = <256>; > > bus-range = <0x0 0xff>; > > - ranges = <0x82000000 0x0 0x40000000 0xa0 > 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ > > + ranges = <0x81000000 0x0 0x00000000 0xa0 > 0x00010000 0x0 0x00010000 > > + 0x82000000 0x0 0x40000000 0xa0 0x40000000 > 0x0 0x40000000>; /* > > +non-prefetchable memory */ > > msi-parent = <&its>; > > + iommu-map = <0 &smmu 0 1>; /* This is fixed-up by > u-boot */ > > #interrupt-cells = <1>; > > interrupt-map-mask = <0 0 0 7>; > > interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 129 > IRQ_TYPE_LEVEL_HIGH>, > > <0000 0 0 2 &gic 0 0 GIC_SPI 130 > IRQ_TYPE_LEVEL_HIGH>, > > <0000 0 0 3 &gic 0 0 GIC_SPI 131 > IRQ_TYPE_LEVEL_HIGH>, > > <0000 0 0 4 &gic 0 0 GIC_SPI 132 > IRQ_TYPE_LEVEL_HIGH>; > > - iommu-map = <0 &smmu 0 1>; /* Fixed-up by > bootloader */ > > status = "disabled"; > > }; > > > > pcie6: pcie@3900000 { > > - compatible = "fsl,lx2160a-pcie"; > > - reg = <0x00 0x03900000 0x0 0x00100000>, /* > controller registers */ > > - <0xa8 0x00000000 0x0 0x00002000>; /* > configuration space */ > > - reg-names = "csr_axi_slave", "config_axi_slave"; > > + compatible = "fsl,ls2088a-pcie"; > > + reg = <0x00 0x03900000 0x0 0x00100000 /* controller > registers */ > > + 0xa8 0x00000000 0x0 0x00002000>; /* > configuration space */ > > + reg-names = "regs", "config"; > > interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>, > /* AER interrupt */ > > <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>, /* > PME interrupt */ > > <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>; /* > controller interrupt > > */ @@ -1240,18 +1240,18 @@ pcie6: pcie@3900000 { > > #size-cells = <2>; > > device_type = "pci"; > > dma-coherent; > > - apio-wins = <8>; > > - ppio-wins = <8>; > > + num-viewport = <8>; > > bus-range = <0x0 0xff>; > > - ranges = <0x82000000 0x0 0x40000000 0xa8 > 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ > > + ranges = <0x81000000 0x0 0x00000000 0xa8 > 0x00010000 0x0 0x00010000 > > + 0x82000000 0x0 0x40000000 0xa8 0x40000000 > 0x0 0x40000000>; /* > > +non-prefetchable memory */ > > msi-parent = <&its>; > > + iommu-map = <0 &smmu 0 1>; /* This is fixed-up by > u-boot */ > > #interrupt-cells = <1>; > > interrupt-map-mask = <0 0 0 7>; > > interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 104 > IRQ_TYPE_LEVEL_HIGH>, > > <0000 0 0 2 &gic 0 0 GIC_SPI 105 > IRQ_TYPE_LEVEL_HIGH>, > > <0000 0 0 3 &gic 0 0 GIC_SPI 106 > IRQ_TYPE_LEVEL_HIGH>, > > <0000 0 0 4 &gic 0 0 GIC_SPI 107 > IRQ_TYPE_LEVEL_HIGH>; > > - iommu-map = <0 &smmu 0 1>; /* Fixed-up by > bootloader */ > > status = "disabled"; > > }; > > > > -- > > 2.25.1 > >
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