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    Subject[PATCH 4.19 09/35] KVM: SVM: relax conditions for allowing MSR_IA32_SPEC_CTRL accesses
    Date
    From: Paolo Bonzini <pbonzini@redhat.com>

    [ Upstream commit df7e8818926eb4712b67421442acf7d568fe2645 ]

    Userspace that does not know about the AMD_IBRS bit might still
    allow the guest to protect itself with MSR_IA32_SPEC_CTRL using
    the Intel SPEC_CTRL bit. However, svm.c disallows this and will
    cause a #GP in the guest when writing to the MSR. Fix this by
    loosening the test and allowing the Intel CPUID bit, and in fact
    allow the AMD_STIBP bit as well since it allows writing to
    MSR_IA32_SPEC_CTRL too.

    Reported-by: Zhiyi Guo <zhguo@redhat.com>
    Analyzed-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
    Analyzed-by: Laszlo Ersek <lersek@redhat.com>
    Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
    Signed-off-by: Sasha Levin <sashal@kernel.org>
    ---
    arch/x86/kvm/svm.c | 4 ++++
    1 file changed, 4 insertions(+)

    diff --git a/arch/x86/kvm/svm.c b/arch/x86/kvm/svm.c
    index a0c3d1b4b295b..f513110983d4c 100644
    --- a/arch/x86/kvm/svm.c
    +++ b/arch/x86/kvm/svm.c
    @@ -4209,6 +4209,8 @@ static int svm_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
    break;
    case MSR_IA32_SPEC_CTRL:
    if (!msr_info->host_initiated &&
    + !guest_cpuid_has(vcpu, X86_FEATURE_SPEC_CTRL) &&
    + !guest_cpuid_has(vcpu, X86_FEATURE_AMD_STIBP) &&
    !guest_cpuid_has(vcpu, X86_FEATURE_AMD_IBRS) &&
    !guest_cpuid_has(vcpu, X86_FEATURE_AMD_SSBD))
    return 1;
    @@ -4312,6 +4314,8 @@ static int svm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
    break;
    case MSR_IA32_SPEC_CTRL:
    if (!msr->host_initiated &&
    + !guest_cpuid_has(vcpu, X86_FEATURE_SPEC_CTRL) &&
    + !guest_cpuid_has(vcpu, X86_FEATURE_AMD_STIBP) &&
    !guest_cpuid_has(vcpu, X86_FEATURE_AMD_IBRS) &&
    !guest_cpuid_has(vcpu, X86_FEATURE_AMD_SSBD))
    return 1;
    --
    2.27.0


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