Messages in this thread | | | From | Jerome Brunet <> | Subject | Re: [PATCH 0/2] clk: meson: axg: Remove MIPI enable clock gate | Date | Mon, 04 Jan 2021 12:42:15 +0100 |
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On Tue 10 Mar 2020 at 09:05, Jerome Brunet <jbrunet@baylibre.com> wrote:
> On Mon 09 Mar 2020 at 22:01, Remi Pommarel <repk@triplefau.lt> wrote: > >> As discussed here [0], HHI_MIPI_CNTL0 is part of the MIPI/PCIe analog >> PHY region and is not related to clock one. Since MIPI/PCIe PHY driver >> has been added with [1], this region can be removed from the clock >> driver. >> >> Please not that this serie depends on [1] to be merged first. >> >> [0] https://lkml.org/lkml/2019/12/16/119 >> [1] https://lkml.org/lkml/2020/1/23/945 > > Series look good. Will apply after v5.7-rc1 >
Finally applied ... sorry for the delay
>> >> Remi Pommarel (2): >> clk: meson: axg: Remove MIPI enable clock gate >> clk: meson-axg: remove CLKID_MIPI_ENABLE >> >> drivers/clk/meson/axg.c | 3 --- >> drivers/clk/meson/axg.h | 1 - >> include/dt-bindings/clock/axg-clkc.h | 1 - >> 3 files changed, 5 deletions(-) > > > _______________________________________________ > linux-amlogic mailing list > linux-amlogic@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-amlogic
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