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    SubjectRE: [PATCHv7 00/12]PCI: dwc: Add the multiple PF support for DWC and Layerscape
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    Hi Lorenzo,

    Thanks a lot for your comments!

    > -----Original Message-----
    > From: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
    > Sent: 2020年9月18日 0:20
    > To: Z.q. Hou <zhiqiang.hou@nxp.com>
    > Cc: linux-pci@vger.kernel.org; devicetree@vger.kernel.org;
    > linux-kernel@vger.kernel.org; linux-arm-kernel@lists.infradead.org;
    > linuxppc-dev@lists.ozlabs.org; robh+dt@kernel.org; bhelgaas@google.com;
    > shawnguo@kernel.org; Leo Li <leoyang.li@nxp.com>; kishon@ti.com;
    > gustavo.pimentel@synopsys.com; Roy Zang <roy.zang@nxp.com>;
    > jingoohan1@gmail.com; andrew.murray@arm.com; Mingkai Hu
    > <mingkai.hu@nxp.com>; M.h. Lian <minghuan.lian@nxp.com>
    > Subject: Re: [PATCHv7 00/12]PCI: dwc: Add the multiple PF support for DWC
    > and Layerscape
    >
    > On Tue, Aug 11, 2020 at 05:54:29PM +0800, Zhiqiang Hou wrote:
    > > From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
    > >
    > > Add the PCIe EP multiple PF support for DWC and Layerscape, and use a
    > > list to manage the PFs of each PCIe controller; add the doorbell MSIX
    > > function for DWC; and refactor the Layerscape EP driver due to some
    > > difference in Layercape platforms PCIe integration.
    > >
    > > Hou Zhiqiang (1):
    > > misc: pci_endpoint_test: Add driver data for Layerscape PCIe
    > > controllers
    > >
    > > Xiaowei Bao (11):
    > > PCI: designware-ep: Add multiple PFs support for DWC
    > > PCI: designware-ep: Add the doorbell mode of MSI-X in EP mode
    > > PCI: designware-ep: Move the function of getting MSI capability
    > > forward
    > > PCI: designware-ep: Modify MSI and MSIX CAP way of finding
    > > dt-bindings: pci: layerscape-pci: Add compatible strings for ls1088a
    > > and ls2088a
    > > PCI: layerscape: Fix some format issue of the code
    > > PCI: layerscape: Modify the way of getting capability with different
    > > PEX
    > > PCI: layerscape: Modify the MSIX to the doorbell mode
    > > PCI: layerscape: Add EP mode support for ls1088a and ls2088a
    > > arm64: dts: layerscape: Add PCIe EP node for ls1088a
    > > misc: pci_endpoint_test: Add LS1088a in pci_device_id table
    > >
    > > .../bindings/pci/layerscape-pci.txt | 2 +
    > > .../arm64/boot/dts/freescale/fsl-ls1088a.dtsi | 31 +++
    > > drivers/misc/pci_endpoint_test.c | 8 +-
    > > .../pci/controller/dwc/pci-layerscape-ep.c | 100 +++++--
    > > .../pci/controller/dwc/pcie-designware-ep.c | 258
    > ++++++++++++++----
    > > drivers/pci/controller/dwc/pcie-designware.c | 59 ++--
    > > drivers/pci/controller/dwc/pcie-designware.h | 48 +++-
    > > 7 files changed, 410 insertions(+), 96 deletions(-)
    >
    > Side note: I will change it for you but please keep Signed-off-by:
    > tags together in the log instead of mixing them with other tags randomly.
    >
    > Can you rebase this series against my pci/dwc branch please and send a v8 ?
    >
    > I will apply it then.

    I'll rebase this series and put the Signed-off-by tags together today.

    Regards,
    Zhiqiang

    >
    > Thanks,
    > Lorenzo
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