Messages in this thread | | | Subject | Re: [PATCH v21 4/4] arm64: dts: mt8183: add scp node | From | Matthias Brugger <> | Date | Thu, 27 Aug 2020 12:14:12 +0200 |
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On 12/11/2019 12:03, Pi-Hsun Shih wrote: > From: Eddie Huang <eddie.huang@mediatek.com> > > Add scp node to mt8183 and mt8183-evb > > Signed-off-by: Erin Lo <erin.lo@mediatek.com> > Signed-off-by: Pi-Hsun Shih <pihsun@chromium.org> > Signed-off-by: Eddie Huang <eddie.huang@mediatek.com>
Sorry I somehow oversaw this. Next time please don't doubt to ping me.
Bjorn, do I understand correctly that you don't send emails to the list informing of the inclusion of a patch/series in your tree?
Anyway applied now to v5.9-next/dts64 :)
Thanks!
> --- > Changes from v20 ... v14: > - No change. > > Changes from v13: > - Change the size of the cfg register region. > > Changes from v12 ... v10: > - No change. > > Changes from v9: > - Remove extra reserve-memory-vpu_share node. > > Changes from v8: > - New patch. > --- > arch/arm64/boot/dts/mediatek/mt8183-evb.dts | 11 +++++++++++ > arch/arm64/boot/dts/mediatek/mt8183.dtsi | 12 ++++++++++++ > 2 files changed, 23 insertions(+) > > diff --git a/arch/arm64/boot/dts/mediatek/mt8183-evb.dts b/arch/arm64/boot/dts/mediatek/mt8183-evb.dts > index 1fb195c683c3..ddb7a7ac9655 100644 > --- a/arch/arm64/boot/dts/mediatek/mt8183-evb.dts > +++ b/arch/arm64/boot/dts/mediatek/mt8183-evb.dts > @@ -24,6 +24,17 @@ memory@40000000 { > chosen { > stdout-path = "serial0:921600n8"; > }; > + > + reserved-memory { > + #address-cells = <2>; > + #size-cells = <2>; > + ranges; > + scp_mem_reserved: scp_mem_region { > + compatible = "shared-dma-pool"; > + reg = <0 0x50000000 0 0x2900000>; > + no-map; > + }; > + }; > }; > > &auxadc { > diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi > index 10b32471bc7b..e582f5e6691d 100644 > --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi > +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi > @@ -269,6 +269,18 @@ pwrap: pwrap@1000d000 { > clock-names = "spi", "wrap"; > }; > > + scp: scp@10500000 { > + compatible = "mediatek,mt8183-scp"; > + reg = <0 0x10500000 0 0x80000>, > + <0 0x105c0000 0 0x19080>; > + reg-names = "sram", "cfg"; > + interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&infracfg CLK_INFRA_SCPSYS>; > + clock-names = "main"; > + memory-region = <&scp_mem_reserved>; > + status = "disabled"; > + }; > + > systimer: timer@10017000 { > compatible = "mediatek,mt8183-timer", > "mediatek,mt6765-timer"; >
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