Messages in this thread | ![/](/images/icornerl.gif) | | Subject | Re: [PATCH v2 1/1] iommu/vt-d: Serialize IOMMU GCMD register modifications | From | Lu Baolu <> | Date | Fri, 28 Aug 2020 08:00:06 +0800 |
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Hi,
On 8/27/20 1:39 PM, Tian, Kevin wrote: >> From: Lu Baolu <baolu.lu@linux.intel.com> >> Sent: Thursday, August 27, 2020 12:25 PM >> >> The VT-d spec requires (10.4.4 Global Command Register, GCMD_REG >> General >> Description) that: >> >> If multiple control fields in this register need to be modified, software >> must serialize the modifications through multiple writes to this register. >> >> However, in irq_remapping.c, modifications of IRE and CFI are done in one >> write. We need to do two separate writes with STS checking after each. >> >> Fixes: af8d102f999a4 ("x86/intel/irq_remapping: Clean up x2apic opt-out >> security warning mess") >> Cc: Andy Lutomirski <luto@amacapital.net> >> Cc: Jacob Pan <jacob.jun.pan@linux.intel.com> >> Cc: Kevin Tian <kevin.tian@intel.com> >> Cc: Ashok Raj <ashok.raj@intel.com> >> Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com> >> --- >> drivers/iommu/intel/irq_remapping.c | 11 +++++++++-- >> 1 file changed, 9 insertions(+), 2 deletions(-) >> >> Change log: >> v1->v2: >> - v1 posted here >> https://lore.kernel.org/linux-iommu/20200826025825.2322-1- >> baolu.lu@linux.intel.com/; >> - Add status check before disabling CFI. (Kevin) >> >> diff --git a/drivers/iommu/intel/irq_remapping.c >> b/drivers/iommu/intel/irq_remapping.c >> index 9564d23d094f..7552bb7e92c8 100644 >> --- a/drivers/iommu/intel/irq_remapping.c >> +++ b/drivers/iommu/intel/irq_remapping.c >> @@ -507,12 +507,19 @@ static void iommu_enable_irq_remapping(struct >> intel_iommu *iommu) >> >> /* Enable interrupt-remapping */ >> iommu->gcmd |= DMA_GCMD_IRE; >> - iommu->gcmd &= ~DMA_GCMD_CFI; /* Block compatibility-format >> MSIs */ >> writel(iommu->gcmd, iommu->reg + DMAR_GCMD_REG); >> - >> IOMMU_WAIT_OP(iommu, DMAR_GSTS_REG, >> readl, (sts & DMA_GSTS_IRES), sts); >> >> + /* Block compatibility-format MSIs */ >> + sts = readl(iommu->reg + DMAR_GSTS_REG); > > no need of this readl as the status is already three in IOMMU_WAIT_OP.
Yes. Really!
Best regards, baolu
> >> + if (sts & DMA_GSTS_CFIS) { >> + iommu->gcmd &= ~DMA_GCMD_CFI; >> + writel(iommu->gcmd, iommu->reg + DMAR_GCMD_REG); >> + IOMMU_WAIT_OP(iommu, DMAR_GSTS_REG, >> + readl, !(sts & DMA_GSTS_CFIS), sts); >> + } >> + >> /* >> * With CFI clear in the Global Command register, we should be >> * protected from dangerous (i.e. compatibility) interrupts >> -- >> 2.17.1 >
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