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    Subject[PATCH 5.7 037/204] arm64: perf: Correct the event index in sysfs
    Date
    From: Shaokun Zhang <zhangshaokun@hisilicon.com>

    commit 539707caa1a89ee4efc57b4e4231c20c46575ccc upstream.

    When PMU event ID is equal or greater than 0x4000, it will be reduced
    by 0x4000 and it is not the raw number in the sysfs. Let's correct it
    and obtain the raw event ID.

    Before this patch:
    cat /sys/bus/event_source/devices/armv8_pmuv3_0/events/sample_feed
    event=0x001
    After this patch:
    cat /sys/bus/event_source/devices/armv8_pmuv3_0/events/sample_feed
    event=0x4001

    Signed-off-by: Shaokun Zhang <zhangshaokun@hisilicon.com>
    Cc: Will Deacon <will@kernel.org>
    Cc: Mark Rutland <mark.rutland@arm.com>
    Cc: <stable@vger.kernel.org>
    Link: https://lore.kernel.org/r/1592487344-30555-3-git-send-email-zhangshaokun@hisilicon.com
    [will: fixed formatting of 'if' condition]
    Signed-off-by: Will Deacon <will@kernel.org>
    Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

    ---
    arch/arm64/kernel/perf_event.c | 13 ++++++++-----
    1 file changed, 8 insertions(+), 5 deletions(-)

    --- a/arch/arm64/kernel/perf_event.c
    +++ b/arch/arm64/kernel/perf_event.c
    @@ -155,7 +155,7 @@ armv8pmu_events_sysfs_show(struct device

    pmu_attr = container_of(attr, struct perf_pmu_events_attr, attr);

    - return sprintf(page, "event=0x%03llx\n", pmu_attr->id);
    + return sprintf(page, "event=0x%04llx\n", pmu_attr->id);
    }

    #define ARMV8_EVENT_ATTR(name, config) \
    @@ -244,10 +244,13 @@ armv8pmu_event_attr_is_visible(struct ko
    test_bit(pmu_attr->id, cpu_pmu->pmceid_bitmap))
    return attr->mode;

    - pmu_attr->id -= ARMV8_PMUV3_EXT_COMMON_EVENT_BASE;
    - if (pmu_attr->id < ARMV8_PMUV3_MAX_COMMON_EVENTS &&
    - test_bit(pmu_attr->id, cpu_pmu->pmceid_ext_bitmap))
    - return attr->mode;
    + if (pmu_attr->id >= ARMV8_PMUV3_EXT_COMMON_EVENT_BASE) {
    + u64 id = pmu_attr->id - ARMV8_PMUV3_EXT_COMMON_EVENT_BASE;
    +
    + if (id < ARMV8_PMUV3_MAX_COMMON_EVENTS &&
    + test_bit(id, cpu_pmu->pmceid_ext_bitmap))
    + return attr->mode;
    + }

    return 0;
    }

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