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SubjectRe: [PATCH] edac: nxp: Add L1 and L2 error detection for A53 and A72 cores
On Thu, Jul 09, 2020 at 04:22:15PM +0800, Alison Wang wrote:
> Add error detection for A53 and A72 cores. Hardware error injection is
> supported on A53. Software error injection is supported on both.
> For hardware error injection on A53 to work, proper access to
> L2ACTLR_EL1, CPUACTLR_EL1 needs to be granted by EL3 firmware. This is
> done by making an SMC call in the driver. Failure to enable access
> disables hardware error injection. For error detection to work, another
> SMC call enables access to L2ECTLR_EL1.
>
> It is for NXP's Layerscape family LS1043A, LS1046A, LS2088A and LX2160A.
>
> Signed-off-by: York Sun <york.sun@nxp.com>
> Signed-off-by: Alison Wang <alison.wang@nxp.com>
> ---
> .../bindings/edac/cortex-arm64-edac.txt | 40 +
> drivers/edac/Kconfig | 7 +
> drivers/edac/Makefile | 1 +
> drivers/edac/cortex_arm64_l1_l2.c | 738 ++++++++++++++++++
> drivers/edac/cortex_arm64_l1_l2.h | 54 ++
> 5 files changed, 840 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/edac/cortex-arm64-edac.txt
> create mode 100644 drivers/edac/cortex_arm64_l1_l2.c
> create mode 100644 drivers/edac/cortex_arm64_l1_l2.h

This needs James to have a look at.

Thx.

--
Regards/Gruss,
Boris.

https://people.kernel.org/tglx/notes-about-netiquette

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