Messages in this thread | | | Subject | Re: [PATCH v3 11/13] PCI: brcmstb: Accommodate MSI for older chips | From | Florian Fainelli <> | Date | Wed, 3 Jun 2020 19:56:23 -0700 |
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On 6/3/2020 12:20 PM, Jim Quinlan wrote: > From: Jim Quinlan <jquinlan@broadcom.com> > > Older BrcmSTB chips do not have a separate register for MSI interrupts; the > MSIs are in a register that also contains unrelated interrupts. In > addition, the interrupts lie in bits [31..24] for these legacy chips. This > commit provides common code for both legacy and non-legacy MSI interrupt > registers. > > Signed-off-by: Jim Quinlan <jquinlan@broadcom.com>
Acked-by: Florian Fainelli <f.fainelli@gmail.com> -- Florian
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