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    Subject[PATCH 3/3] riscv: dts: HiFive Unleashed: define a default set of CPU OPPs
    Date
    Define a default set of CPU OPPs for the HiFive Unleashed with the
    FU540-C000 SoC. This allows CPUFreq to be enabled for this board.

    The FU540-C000 SoC PVT corners haven't been characterized separately
    from the HiFive Unleashed board. Thus the OPPs are added to the board
    DT file, rather than the SoC itself.

    The specific selection of OPPs are designed to enable fast switching
    by simply changing the CORE PLL output divider. The exception is the
    1GHz OPP. Since the OPP code apparently requires that, upon kernel
    start, the CPU clock frequency must have been set to an existing OPP
    frequency, the 1GHz rate is present solely because the default HiFive
    Unleashed bootloaders set the CPU to run at 1GHz before starting the
    kernel.

    Signed-off-by: Yash Shah <yash.shah@sifive.com>
    ---
    .../riscv/boot/dts/sifive/hifive-unleashed-a00.dts | 38 ++++++++++++++++++++++
    1 file changed, 38 insertions(+)

    diff --git a/arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts b/arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts
    index 4a2729f..59db9c0 100644
    --- a/arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts
    +++ b/arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts
    @@ -46,6 +46,44 @@
    compatible = "gpio-restart";
    gpios = <&gpio 10 GPIO_ACTIVE_LOW>;
    };
    +
    + fu540_c000_opp_table: opp-table {
    + compatible = "operating-points-v2";
    + opp-shared;
    +
    + opp-350000000 {
    + opp-hz = /bits/ 64 <350000000>;
    + };
    + opp-700000000 {
    + opp-hz = /bits/ 64 <700000000>;
    + };
    + opp-999999999 {
    + opp-hz = /bits/ 64 <999999999>;
    + };
    + opp-1400000000 {
    + opp-hz = /bits/ 64 <1400000000>;
    + };
    + };
    +};
    +
    +&cpu0 {
    + operating-points-v2 = <&fu540_c000_opp_table>;
    +};
    +
    +&cpu1 {
    + operating-points-v2 = <&fu540_c000_opp_table>;
    +};
    +
    +&cpu2 {
    + operating-points-v2 = <&fu540_c000_opp_table>;
    +};
    +
    +&cpu3 {
    + operating-points-v2 = <&fu540_c000_opp_table>;
    +};
    +
    +&cpu4 {
    + operating-points-v2 = <&fu540_c000_opp_table>;
    };

    &uart0 {
    --
    2.7.4
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