Messages in this thread | | | Subject | Re: [PATCH] iommu/amd: Fix event counter availability check | From | Suravee Suthikulpanit <> | Date | Tue, 16 Jun 2020 16:35:48 +0700 |
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On 6/16/20 3:48 AM, Alexander Monakov wrote: >> Alexander >> >> On 6/1/20 4:01 PM, Alexander Monakov wrote: >>> On Mon, 1 Jun 2020, Suravee Suthikulpanit wrote: >>> >>>>> Moving init_iommu_perf_ctr just after iommu_flush_all_caches resolves >>>>> the issue. This is the earliest point in amd_iommu_init_pci where the >>>>> call succeeds on my laptop. >>>> According to your description, it should just need to be anywhere after >>>> the >>>> pci_enable_device() is called for the IOMMU device, isn't it? So, on your >>>> system, what if we just move the init_iommu_perf_ctr() here: >>> No, this doesn't work, as I already said in the paragraph you are responding >>> to. See my last sentence in the quoted part. >>> >>> So the implication is init_device_table_dma together with subsequent cache >>> flush is also setting up something that is necessary for counters to be >>> writable. >>> >>> Alexander >>> >> Instead of blindly moving the code around to a spot that would just work, >> I am trying to understand what might be required here. In this case, >> the init_device_table_dma()should not be needed. I suspect it's the IOMMU >> invalidate all command that's also needed here. >> >> I'm also checking with the HW and BIOS team. Meanwhile, could you please give >> the following change a try: > Hello. Can you give any update please? > > Alexander >
Sorry for late reply. I have a reproducer and working with the HW team to understand the issue. I should be able to provide update with solution by the end of this week.
Suravee
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