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    Subject[RFC 01/11] arm64: Add TRBE definitions
    Date
    This adds TRBE related registers and corresponding feature macros.

    Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com>
    ---
    arch/arm64/include/asm/sysreg.h | 49 +++++++++++++++++++++++++++++++++++++++++
    1 file changed, 49 insertions(+)

    diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
    index 8bfca08..14cb156 100644
    --- a/arch/arm64/include/asm/sysreg.h
    +++ b/arch/arm64/include/asm/sysreg.h
    @@ -330,6 +330,55 @@

    #define SYS_PMMIR_EL1 sys_reg(3, 0, 9, 14, 6)

    +/*
    + * TRBE Registers
    + */
    +#define SYS_TRBLIMITR_EL1 sys_reg(3, 0, 9, 11, 0)
    +#define SYS_TRBPTR_EL1 sys_reg(3, 0, 9, 11, 1)
    +#define SYS_TRBBASER_EL1 sys_reg(3, 0, 9, 11, 2)
    +#define SYS_TRBSR_EL1 sys_reg(3, 0, 9, 11, 3)
    +#define SYS_TRBMAR_EL1 sys_reg(3, 0, 9, 11, 4)
    +#define SYS_TRBTRG_EL1 sys_reg(3, 0, 9, 11, 6)
    +#define SYS_TRBIDR_EL1 sys_reg(3, 0, 9, 11, 7)
    +
    +#define TRBLIMITR_LIMIT_MASK GENMASK(51, 0)
    +#define TRBLIMITR_LIMIT_SHIFT 12
    +#define TRBLIMITR_NVM (1UL << 5)
    +#define TRBLIMITR_TRIG_MODE_MASK GENMASK(1, 0)
    +#define TRBLIMITR_TRIG_MODE_SHIFT 2
    +#define TRBLIMITR_FILL_MODE_MASK GENMASK(1, 0)
    +#define TRBLIMITR_FILL_MODE_SHIFT 1
    +#define TRBLIMITR_ENABLE (1UL << 0)
    +#define TRBPTR_PTR_MASK GENMASK(63, 0)
    +#define TRBPTR_PTR_SHIFT 0
    +#define TRBBASER_BASE_MASK GENMASK(51, 0)
    +#define TRBBASER_BASE_SHIFT 12
    +#define TRBSR_EC_MASK GENMASK(5, 0)
    +#define TRBSR_EC_SHIFT 26
    +#define TRBSR_IRQ (1UL << 22)
    +#define TRBSR_TRG (1UL << 21)
    +#define TRBSR_WRAP (1UL << 20)
    +#define TRBSR_ABORT (1UL << 18)
    +#define TRBSR_STOP (1UL << 17)
    +#define TRBSR_MSS_MASK GENMASK(15, 0)
    +#define TRBSR_MSS_SHIFT 0
    +#define TRBSR_BSC_MASK GENMASK(5, 0)
    +#define TRBSR_BSC_SHIFT 0
    +#define TRBSR_FSC_MASK GENMASK(5, 0)
    +#define TRBSR_FSC_SHIFT 0
    +#define TRBMAR_SHARE_MASK GENMASK(1, 0)
    +#define TRBMAR_SHARE_SHIFT 8
    +#define TRBMAR_OUTER_MASK GENMASK(3, 0)
    +#define TRBMAR_OUTER_SHIFT 4
    +#define TRBMAR_INNER_MASK GENMASK(3, 0)
    +#define TRBMAR_INNER_SHIFT 0
    +#define TRBTRG_TRG_MASK GENMASK(31, 0)
    +#define TRBTRG_TRG_SHIFT 0
    +#define TRBIDR_FLAG (1UL << 5)
    +#define TRBIDR_PROG (1UL << 4)
    +#define TRBIDR_ALIGN_MASK GENMASK(3, 0)
    +#define TRBIDR_ALIGN_SHIFT 0
    +
    #define SYS_MAIR_EL1 sys_reg(3, 0, 10, 2, 0)
    #define SYS_AMAIR_EL1 sys_reg(3, 0, 10, 3, 0)

    --
    2.7.4
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