Messages in this thread | | | Date | Tue, 6 Aug 2019 20:33:33 +0200 | From | Borislav Petkov <> | Subject | Re: [PATCH V2 01/10] x86/CPU: Expose if cache is inclusive of lower level caches |
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On Tue, Aug 06, 2019 at 11:13:22AM -0700, Reinette Chatre wrote: > Some platforms being enabled in this round have SKUs with inclusive > cache and also SKUs with non-inclusive cache. The non-inclusive cache > SKUs do not support cache pseudo-locking and cannot be made to support > cache pseudo-locking with software changes. Needing to know if cache is > inclusive or not will thus remain a requirement to distinguish between > these different SKUs. Supporting cache pseudo-locking on platforms with > non inclusive cache will require new hardware features.
Is there another way/CPUID bit or whatever to tell us whether the platform supports cache pseudo-locking or is the cache inclusivity the only one?
-- Regards/Gruss, Boris.
Good mailing practices for 400: avoid top-posting and trim the reply.
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