Messages in this thread | | | Subject | Re: [PATCH 6/6] mtd: spi-nor: Add the SPI_NOR_XSR_RDY flag | From | Vignesh Raghavendra <> | Date | Mon, 5 Aug 2019 10:44:13 +0530 |
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On 31/07/19 2:42 PM, Tudor.Ambarus@microchip.com wrote: > From: Boris Brezillon <boris.brezillon@bootlin.com> > > S3AN flashes use a specific opcode to read the status register. > We currently use the SPI_S3AN flag to decide whether this specific > SR read opcode should be used, but SPI_S3AN is about to disappear, so > let's add a new flag. >
I think you can drop SPI_S3AN right away either as separate patch in this series or as part of this patch itself.
Regards Vignesh
> Note that we use the same bit as SPI_S3AN implies SPI_NOR_XSR_RDY and > vice versa. > > Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> > Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> > --- > drivers/mtd/spi-nor/spi-nor.c | 10 +++++++++- > 1 file changed, 9 insertions(+), 1 deletion(-) > > diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c > index 5fea5d7ce2cb..01be6d49ce3b 100644 > --- a/drivers/mtd/spi-nor/spi-nor.c > +++ b/drivers/mtd/spi-nor/spi-nor.c > @@ -213,6 +213,14 @@ struct flash_info { > * bit. Must be used with > * SPI_NOR_HAS_LOCK. > */ > +#define SPI_NOR_XSR_RDY BIT(10) /* > + * S3AN flashes have specific opcode to > + * read the status register. > + * Flags SPI_NOR_XSR_RDY and SPI_S3AN > + * use the same bit as one implies the > + * other, but we will get rid of > + * SPI_S3AN soon. > + */ > #define SPI_S3AN BIT(10) /* > * Xilinx Spartan 3AN In-System Flash > * (MFR cannot be used for probing > @@ -4818,7 +4826,7 @@ int spi_nor_scan(struct spi_nor *nor, const char *name, > * spi_nor_wait_till_ready(). Xilinx S3AN share MFR > * with Atmel spi-nor > */ > - if (info->flags & SPI_S3AN) > + if (info->flags & SPI_NOR_XSR_RDY) > nor->flags |= SNOR_F_READY_XSR_RDY; > > /* Kept only for backward compatibility purpose. */ >
-- Regards Vignesh
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