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SubjectRe: [PATCH v6] RISC-V: Implement sparsemem


On 2019-08-29 5:38 p.m., Paul Walmsley wrote:
>> +#ifdef CONFIG_SPARSEMEM
>> +#define MAX_PHYSMEM_BITS CONFIG_PA_BITS
>> +#define SECTION_SIZE_BITS 27
>
> Do you have a specific rationale behind this selection, or is this simply
> a reasonable starting point?

It's inline with what other platforms are doing. So in some ways it's a
reasonable starting point but I don't see any reason to change it in the
near term.

>> +#endif /* CONFIG_SPARSEMEM */
>> +
>> +#endif /* __ASM_SPARSEMEM_H */
>
> The following is what I'm getting ready to queue.

Great, thanks!

Logan

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